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PC48F4400PLVB0 数据表(PDF) 92 Page - Numonyx B.V |
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PC48F4400PLVB0 数据表(HTML) 92 Page - Numonyx B.V |
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92 / 102 page ![]() Numonyx™ Wireless Flash Memory (W18) Datasheet November 2007 92 Order Number: 290701-18 Numonyx™ Wireless Flash Memory (W18) Table 41: System Interface Information Table 40: CFI Identification Offset Length Description Addr. Hex Code Value 10h 3 Query-unique ASCII string “QRY” 10: 11: 12: --51 --52 --59 “Q” “R” “Y” 13h 2 Primary vendor command set and control interface ID code. 16-bit ID code for vendor-specific algorithms. 13: 14: --03 --00 — 15h 2 Extended Query Table primary algorithm address 15: 16: --39 --00 — 17h 2 Alternate vendor command set and control interface ID code. 0000h means no second vendor-specified algorithm exists. 17: 18: --00 --00 — 19h 2 Secondary algorithm Extended Query Table address. 0000h means none exists. 19: 1A: --00 --00 — Offset Length Description Add. Hex Code Value 1Bh 1 1B: --17 1.7V 1Ch 1 1C: --19 1.9V 1Dh 1 1D: --B4 11.4V 1Eh 1 1E: --C6 12.6V 1Fh 1 “n” such that typical single word program time-out = 2n μ-sec 1F: --04 16μs 20h 1 “n” such that typical max. buffer write time-out = 2n μ-sec 20: --00 NA 21h 1 “n” such that typical block erase time-out = 2n m-sec 21: --0A 1s 22h 1 “n” such that typical full chip erase time-out = 2n m-sec 22: --00 NA 23h 1 “n” such that maximum word program time-out = 2n times typical 23: --04 256μs 24h 1 “n” such that maximum buffer write time-out = 2n times typical 24: --00 NA 25h 1 “n” such that maximum block erase time-out = 2n times typical 25: --03 8s 26h 1 “n” such that maximum chip erase time-out = 2n times typical 26: --00 NA VCC logic supply minimum program/erase voltage bits 0–3 BCD 100 mV bits 4–7 BCD volts VCC logic supply maximum program/erase voltage bits 0–3 BCD 100 mV bits 4–7 BCD volts VPP [programming] supply minimum program/erase voltage bits 0–3 BCD 100 mV bits 4–7 HEX volts VPP [programming] supply maximum program/erase voltage bits 0–3 BCD 100 mV bits 4–7 HEX volts |
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