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ORCA ORSPI4 Data Sheet

Table 18. Register Bit Settings for Aggregation Mode and Partition Size

DPRAM Aggregation

Mode

Address 30907 (SPIA),

30A07 (SPIB)

Virtual FIFO Partition Size

Address 30906 (SPIA),

30A06 (SPIB)

Conﬁguration

DPRAM 0

(Register Bits 0:1) = 00

32-bit data width, partition size 1

32-bit data width, partition size 2

32-bit data width, partition size 4

32-bit data width, partition size 8

64-bit data width, partition size 1

64-bit data width, partition size 2

64-bit data width, partition size 4

64-bit data width, partition size 8

128-bit data width, partition size 1

128-bit data width, partition size 2

128-bit data width, partition size 4

128-bit data width, partition size 8

DPRAM 1

(Register Bits 2:3) = 00

32-bit data width, partition size 1

32-bit data width, partition size 2

32-bit data width, partition size 4

32-bit data width, partition size 8

64-bit data width, partition size 1

64-bit data width, partition size 2

64-bit data width, partition size 4

64-bit data width, partition size 8

128-bit data width, partition size 1

128-bit data width, partition size 2

128-bit data width, partition size 4

128-bit data width, partition size 8

DPRAM 2

(Register Bits 4:5) = 00

32-bit data width, partition size 1

32-bit data width, partition size 2

32-bit data width, partition size 4

32-bit data width, partition size 8

64-bit data width, partition size 1

64-bit data width, partition size 2

64-bit data width, partition size 4

64-bit data width, partition size 8

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