ORSPI4 datasheet(99/263 Pages) LATTICE

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Lattice Semiconductor

ORCA ORSPI4 Data Sheet

Table 25. Far End Loopback Register Values

Absolute

Address

(Hex)

Bit

Name

Description

Quarter

Rate Far

End

Static

Far End

Dynamic

Far End

30915

(SPI A)

30A15

(SPI B)

[0]

SPI4_QUARTER_RATE

When set to ‘1’, enables data rates of 100 - 200

Mbps. The PLLs in the transmit and receive SPI4

high-speed blocks are bypassed in this mode.

100

[1]

SPI4_LOOPBK_FE

This control enables far-end loopback when it is

set to 1. Far end loopback sends RDAT inputs

back to TDAT outputs, sends RDCLK back to

TDCLK, sends TSTAT back to RSTAT outputs,

and ATSCLK back to RSCLK.

111

[2]

SPI4_LOW_SPEED_

DATA_SEL

Forces low speed data rates of 400-622 Mbits/s.

The transmit PLL is still used to synthesize the

SPI4 transmit clock TDCLK. However, the

dynamic alignment block in the receive side is

bypassed. No training sequences are used in low

speed mode.

110

[3]

SPI4_STATUS_IO_SEL

‘0’ - Selects LVTTL I/O for SPI4 status.

‘1’ - Selects LVDS I/Os for SPI4 status (Full-rate

LVDS status I/Os speciﬁed by OIF SPI4.0 is not

supported).

0 or 1

[4]

SPI4_LOOPBK_HS

Enables loops from high-speed SPI4 TDAT out-

puts to RDAT inputs and RSTAT to TSTAT status

inputs just before I/O.

000

[5]

SPI4_LOOPBK_LS

Enables near-end parallel loopback from TDP to

RDP blocks and RSP to TSP blocks bypassing

the high-speed SPI4 interface logic blocks. Must

enable SPI4_LOOPBK_HS for this to work.

000

[6]

TX_FORCE_DIP4_ERR

[7]

RX_FORCE_DIP2_ERR

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