STV0118 datasheet(22/42 Pages) STMICROELECTRONICS

22 / 42 page

CKREF

(27MHz)

nosd

osd

nosd

osd

nosd

osd

Y’

nosd

Y’

osd

nosd

54Mbit/s

YCRCB Stream

Figure 32 : 54Mbit/s Dual YCRCB Stream

IV.17 - Dual Encoding Application with 54Mbit/s YCrCb Interface

IV - FUNCTIONAL DESCRIPTION (continued)

The STV0118 is able to interface with SGS-

THOMSON’s MPEG decoders capable of supply-

ing a 5 4-Mbit /s YCrCB multi plex, like the

STi3520M. This multiplex embeds two 27Mbit/s

YCrCb video streams, one with OSD contents and

the other without OSD content (see Figure 32).

Note that the frequency of the reference clock

supplied to the encoder is still 27MHz, only both

edges are used in the interface.

The MPEG decoder being usually slaved to the

encoder, if two encoders are to be used in parallel,

one of them must be master and the other must be

slave. Figure 33 shows a typical dual encoding

application (although other applications where two

STV0118’s are slave are possible).

It is also necessary to be able to control inde-

pendently the encoders. One solution is to have

two separate I

2C busses (one for each encoder)

running from the microcontroller (this is possible on

SGS-THOMSON’s ST20, which features two I

busses), another solution is to change the I

2C chip

address of one of the STV0118.

This can be done with the following procedure :

- If no Teletext is required, tie pin TTXS/ CSI2C of

the 1st encoder to ‘0’.

- If Teletext encoding is needed, connect the

TTXS/CSI2C pin of the first encoder to both the

TTXS input pin of the Teletext Buffer / Transport

IC (e.g. SGS-Thomson’s TP2) and a pull-down

resistor (needed for power-on configuration).

- Connect TTXS/CSI2C of the second encoder to

logic ‘1’.

- Before performing any Teletext-related program-

ming, set to ‘1’ bit “chgi2c” in configuration regis-

ter 6.

On hardware reset, both encoders have the same

default I

2C address (40-41hex). When bit “chgi2c”

toggles to ‘1’, the I

2C address of the first encoder

(with TTXS/CSI2C pulled low) keeps unchanged at

40-41hex, whilst the I

2C address of the second

encoder (with TTXS/CSI2C = ‘1’) switches to 42-

43hex and can no more be changed until the next

hardware reset.

After I

2C address change, the second encoder

must be programmedto choose the YCRCb incom-

ing data stream on the falling edge of CKREF (see

bit ’nosd’ in configuration register 3).

STV0118

22/42

STV0118 数据表(PDF) 22 Page - STMicroelectronics

STV0118 数据表(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

数据表下载

链接网址

STV0118 数据表(PDF) 22 Page - STMicroelectronics

STV0118 数据表(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

数据表 下载

链接网址

数据表下载