STV0118 datasheet(4/42 Pages) STMICROELECTRONICS

4 / 42 page

II.2 - Pin Description

Name

Type

Function

HSYNC

I/O

Line Synchronization Signal :

- Input in ODDEV+HSYNC or VSYNC + HSYNC or VSYNC slave modes

- Output in all other modes (master/slave)

- Synchronous to rising edge of CKREF

- Default polarity : negative pulse

YCrCb7

YCrCb6

YCrCb5

YCrCb4

YCrCb3

YCrCb2

YCrCb1

YCrCb0

I/O

Input : time multiplexed 4:2:2 luminance and chrominance data as defined in ITU-R

Rec601-2 and Rec656 (except for TTL input levels). This bus interfaces with MPEG video

decoder output port and typically carries a stream of Cb,Y,Cr,Y digital video at CKREF

frequency, clocked on the rising edge (by default) of CKREF. A 54-Mbit/s ‘double’ Cb, Y,

Cr, Y input multiplex is supported for double encoding application (rising and falling edge

of CKREF are operating). Output: for test purpose only.

VSS

Supply

Digital Ground

CVBS

Output

Analog Composite Video Output (current-driven).

CVBS must be connected to analog ground over a load resistor (RLOAD).

Following the load resistor, a simple analog low pass filter is recommended CVBS

amplitude is proportional to IREF(CVBS) (VOUT(N) =N xRLOAD xIREF(CVBS)/96) with N = [0-

511] VOUT(Max.) =1VPP and IOUT(Max.) = 5mA

VR_CVBS

I/O

Internal Reference Voltage for the 9-bit DAC CVBS.

VR_CVBS must be connected to analog ground over a capacitor (6.8nF typ.),

VR_CVBS = 1.9V

IREF(CVBS)

I/O

Reference current source for the 9-bit DAC CVBS.

-IREF(CVBS) must be biased to analog ground over a reference resistor RREF(CVBS)

-RREF(CVBS)(Min.) = 5.95 x RLOAD/VOUT(Max.) with VOUT(Max.) =1VPP and IOUT(Max.) = 5mA

(IREF(CVBS) =VREF(CVBS)/RREF(CVBS)), VREF(CVBS)(Typ.) = 1.12V.

VSSA

Supply

Analog ground for DACs

VDDA

Supply

Analog positive power supply for DACs (+3.3V nom.)

IREF(RGB)

I/O

Reference current source for Tri-DAC R/Y,G/C,B/CVBS.

-IREF(RGB) must be connected to analog ground over a reference resistor RREF(RGB)

-RREF(RGB)(Min.) = 5.95 x RLOAD/VOUT(Max.), with VOUT(Max.) =1VPP and IOUT(Max.) = 5mA

(IREF(RGB) =VREF(RGB)/RREF(RGB)), VREF(RGB) (Typ.) = 1.12V.

VR_RGB

I/O

Internal reference voltage for the 9bit Tri-DAC R/Y,G/C,B/CVBS.

VR_RGB must be biased to analog ground over a typical 6.8nF capacitor, VR_RGB = 1.9V.

B/CVBS

Analog ‘Blue’ or CVBS output (current-driven).

This output must be connected to analog ground over a load resistor (RLOAD).

Following the load resistor, a simple analog low pass filter is recommended.

VOUT(Max.) =1VPP and IOUT(Max.) = 5mA (VOUT(N) =N x RLOAD xIREF(RGB)/96)

with N = [0-511].

R/C

Analog ‘Red’ or S-VHS Chrominance output (current-driven).

This output must be connected to analog ground over a load resistor (RLOAD).

Following the load resistor, a simple analog low pass filter is recommended.

VOUT(Max.) =1VPP and IOUT(Max.) = 5mA (VOUT(N) =N x RLOAD xIREF(RGB)/96)

with N = [0-511].

G/Y

Analog ‘Green’ or S-VHS Luminance output (current-driven).

This output must be connected to analog ground over a load resistor (RLOAD).

Following the load resistor, a simple analog low pass filter is recommended.

VOUT(Max.) =1VPP and IOUT(Max.) = 5mA (VOUT(N) =N x RLOAD xIREF(RGB)/96)

with N = [0-511].

VDD

Supply

Digital positive supply voltage (+3.3V nom.)

TTXS/CSI2C

I/O

Output : positive sync pulse for control of Teletext buffer in external demultiplexer or

Transport IC.

TTXD

I/O

Teletext data stream from external demultiplexer or Transport IC synchronous to rising

edge of CKREF signal average rate of 6.9375Mbit/s.

Output in test mode only.

II - PIN INFORMATION (continued)

STV0118

4/42

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