TAS3218IPZP datasheet(53/79 Pages) TI

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TAS3218

www.ti.com ....................................................................................................................................................................................................... SLES235 – JULY 2008

Table 12. DSP Coefficient RAM Block Structure

STARTING

DATA BLOCK FORMAT

SIZE

VALUE

NOTES

BYTE

Checksum MSB

2 byte

Checksum of byte 2 through N + 12

Checksum LSB

Header ID byte 1

0x00

2 byte

Must be 0x001F

Header ID byte 2

0x1F

Micro program RAM or micro external

Memory to be loaded

1 byte

0x03

data RAM

0x00

1 byte

0x00

Unused

Start memory address

MSB

If this is a termination header, this

2 byte

value is 0000

Start memory address

LSB

Total number of byte

transferred MSB

2 byte

Header (12) + data (N) + checksum (4)

Total number of byte

transferred LSB

0x00

1 byte

0x00

Unused

0x00

1 byte

0x00

Unused

Data byte 1 (LSB)

Coefficient word 1 D7D0

Data byte 2

D15D8

4 byte

Data byte 3

D23D16

Data byte 4 (MSB)

D31D24

Data byte 5 (LSB)

Data byte 6

4 byte

Coefficient word 2

Data byte 7

Data byte 8 (MSB)

0x00

Repeated checksum byte 2 through N

N + 12

4 byte

+11

Checksum MSB

Checksum LSB

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