TAS3218IPZP datasheet(28/79 Pages) TI

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I C Sub Address x 0C

S Slave Addr

Sub Addr

Ack

Ack WDE

See Note A

Res

Reset

“0” (default state) enables

watchdog timer

GPIO IN/OUT GPIO DIR

Ack

GPIOMICROCOUNT

MS BYTE

GPIOMICROCOUNT

LS BYTE

Ack

GPIO_samp_int

Watchdog Timer

MICRO_CLK

Data_IN_OUT

Data Path

Switch

Sampling

Logic

Decode 2^16

8051 uC Firmware

8051 uControl

Down Counter

GPIO1

ENB

GPIO1

ENB

TAS3218

SLES235 – JULY 2008 ....................................................................................................................................................................................................... www.ti.com

Watchdog Timer

There is a hardware watchdog timer in the TAS3218 that can be programmed in the customer application code

to monitor the microprocessor activity. If the watchdog timer expires it will generate a reset to the 8051

microprocessor. GPIOMICROCOUNT, in subaddress 0x0C, is used in order to trigger GPIO input/output and the

monitoring to the DSP diagnostic count. Because of this, the value selected for GPIOMICROCOUNT must be

chosen to provide a good tradeoff of between micro overheard and adequate execution frequency of these

processes. The default value for this counter is 0x5820 which corresponds to a period of 1.25 ms.

Figure 18 shows the GPIO register, the GPOI interface, and a typical user application code implementation of the

watchdog timer reset.

Determines how many consecutive Logic 0 samples (where each sample is spaced by GPIOMICROCOUNT

Micro_clks) are required to read a Logic 0 on a GPIO input port

Figure 18. GPIO Ports

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