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ADE5166/ADE5169

Rev. 0 | Page 60 of 148

Reactive Power No Load Detection

The ADE5169 includes a no load threshold feature on the reactive

energy that eliminates any creep effects in the meter. The ADE5169

accomplishes this by not accumulating reactive energy when

the multiplier output is below the no load threshold. When the

reactive power is below the no load threshold, the RNOLOAD flag

(Bit 1) in the Interrupt Status 1 SFR (MIRQSTL, Address 0xDC)

is set. If the RNOLOAD bit (Bit 1) is set in the Interrupt Enable 1

SFR (MIRQENL, Address 0xD9), the 8052 core has a pending ADE

interrupt. The ADE interrupt stays active until the RNOLOAD

status bit is cleared (see the Energy Measurement Interrupts

section).

The no load threshold level can be selected by setting the

VARNOLOAD bits (Bits[3:2])in the NLMODE register, located

at Address 0x0E. Setting these bits to 0b00 disables the no load

detection, and setting them to 0b01, 0b10, or 0b11 sets the no

load detection threshold to 0.015%, 0.0075%, and 0.0037% of

the full-scale output frequency of the multiplier, respectively.

REACTIVE ENERGY CALCULATION (ADE5169)

As for active energy, the ADE5169 achieves the integration of the

reactive power signal by continuously accumulating the reactive

power signal in an internal, nonreadable, 49-bit energy register. The

reactive energy register (VARHR[23:0], Address 0x04) represents

the upper 24 bits of this internal register. The VARHR register

and its function are available for the ADE5169.

The discrete time sample period (T) for the accumulation register

in the ADE5169 is 1.22 μs (5/MCLK). As well as calculating the

energy, this integration removes any sinusoidal components

that may be in the active power signal. Figure 67 shows this

discrete time integration or accumulation. The reactive power

signal in the waveform register is continuously added to the

internal reactive energy register.

The reactive energy accumulation depends on the setting of the

SAVARM and ABSVARM bits in the ACCMODE register

(Address 0x0F). When both bits are cleared, the addition is

signed and, therefore, negative energy is subtracted from the

reactive energy contents. When both bits are set, the ADE5169

is set to be in the more restrictive mode, which is the absolute

accumulation mode.

When the SAVARM bit (Bit 2) in the ACCMODE register

(Address 0x0F) is set, the reactive power is accumulated

depending on the sign of the active power. When active power

is positive, the reactive power is added as it is to the reactive energy

subtracted from the reactive energy accumulator (see the Var

Antitamper Accumulation Mode section).

When the ABSVARM bit (Bit 3) in the ACCMODE register

(Address 0x0F) is set, the absolute reactive power is used for the

reactive energy accumulation (see the Var Absolute Accumulation

Mode section).

The output of the multiplier is divided by VARDIV. If the value

in the VARDIV register (Address 0x25) is equal to 0, the internal

reactive energy register is divided by 1. VARDIV is an 8-bit,

unsigned register. After dividing by VARDIV, the reactive energy is

accumulated in a 49-bit internal energy accumulation register.

The upper 24 bits of this register are accessible through a read to

the reactive energy register (VARHR[23:0], Address 0x04). A read

to the RVAHR register (Address 0x08) returns the content of

the VARHR register, and the upper 24 bits of the internal register

are cleared.

As shown in Figure 67, the reactive power signal is accumulated

in an internal 49-bit, signed register. The reactive power signal

can be read from the waveform register by setting the WAVMODE

Interrupt Enable 3 SFR (MIRQENH, Address 0xDB). Like the

current and voltage channel waveform sampling modes, the

waveform data is available at sample rates of 25.6 kSPS, 12.8

kSPS, 6.4 kSPS, and 3.2 kSPS.

Figure 62 shows this energy accumulation for full-scale signals

(sinusoidal) on the analog inputs. These curves also apply for

the reactive energy accumulation.

Note that the energy register contents roll over to full-scale

negative (0x800000) and continue to increase in value when

the power or energy flow is positive. Conversely, if the power is

negative, the energy register underflows to full-scale positive

(0x7FFFFF) and continues to decrease in value.

Using the interrupt enable register (MIRQENM, Address 0xDA),

the ADE5169 can be configured to issue an ADE interrupt to

the 8052 core when the reactive energy register is half-full

(positive or negative) or when an overflow or underflow occurs.

Integration Time Under Steady Load: Reactive Energy

As mentioned in the Active Energy Calculation section, the

discrete time sample period (T) for the accumulation register is

1.22 μs (5/MCLK). With full-scale sinusoidal signals on the

analog inputs and the VARGAIN register (Address 0x1E) and

the VARDIV register (Address 0x25) set to 0x000, the integration

time before the reactive energy register overflows is calculated

in Equation 24.

Time =

min

sec

409

0xCCCCD

FFFF

FFFF,

0xFFFF,

VARDIV

Time

WDIV

(24)

When VARDIV is set to a value different from 0, the integration

time varies, as shown in Equation 25.

(25)

Reactive Energy Accumulation Modes

Var Signed Accumulation Mode

The ADE5169 reactive energy default accumulation mode is a

signed accumulation based on the reactive power information.

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