ADE5166 datasheet(33/148 Pages) AD

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ADE5166/ADE5169

Rev. 0 | Page 33 of 148

3.3 V PERIPHERALS AND WAKE-UP EVENTS

Some of the 3.3 V peripherals are capable of waking the ADE5166/

ADE5169 from PSM2 mode. The events that can cause the

ADE5166/ADE5169 to wake up from PSM2 mode are listed

in the Wake-Up Event column in Table 28. The interrupt flag

associated with these events must be cleared prior to executing

instructions that put the ADE5166/ADE5169 in PSM2 mode

after wake-up.

Table 28. 3.3 V Peripherals and Wake-Up Events

3.3 V

Peripheral

Wake-Up

Event

Wake-Up

Enable Bits

Flag

Interrupt

Vector

Comments

Temperature

ADC

∆T

Maskable

The temperature ADC can wake up the ADE5166/ADE5169.

A pending interrupt is generated according to the description

in the Temperature Measurement section. This wake-up event

can be disabled by disabling temperature measurements in the

temperature and supply delta SFR (DIFFPROG, Address 0xF3)

in PSM2 mode. The temperature interrupt needs to be

serviced and acknowledged prior to entering PSM2 mode.

VDCIN ADC

ΔV

Maskable

FVADC

IPSM

The VDCIN measurement can wake up the ADE5166/ADE5169.

FVADC is set according to the description in the External

Voltage Measurement section. This wake-up event can be

disabled by clearing EVADC in the power management

interrupt enable SFR (IPSME, Address 0xEC); see Table 20. The

FVADC flag needs to be cleared prior to entering PSM2 mode.

Power Supply

Management

PSR

Nonmaskable

PSR

IPSM

The ADE5166/ADE5169 wake up if the power supply is restored

(if VSWOUT switches to be connected to VDD). The VSWSOURCE

flag, Bit 6 of the peripheral configuration SFR (PERIPH,

Address 0xF4), is set to indicate that VSWOUT is connected to VDD.

RTC

Interval

Maskable

ITFLAG

IRTC

The ADE5166/ADE5169 wake up after the programmable

time interval has elapsed. The RTC interrupt needs to be

serviced and acknowledged prior to entering PSM2 mode.

Alarm

Maskable

Alarm

IRTC

An alarm can be set to wake the ADE5166/ADE5169 after the

desired amount of time. The RTC alarm is enabled by setting

the ALxx_EN bits in the RTC Configuration 2 SFR (TIMECON2,

Address 0xA2). The RTC interrupt needs to be serviced and

acknowledged prior to entering PSM2 mode.

I/O Ports1

INT0

INT0PRG = 1

IE0

The edge of the interrupt is selected by the IT0 bit in the TCON

SFR (TCON, Address 0x88). The IE0 flag bit in the TCON SFR is

not affected. The Interrupt 0 interrupt needs to be serviced

and acknowledged prior to entering PSM2 mode.

INT1

INT1PRG = 11x

IE1

The edge of the interrupt is selected by the IT1 bit in the TCON

SFR (TCON, Address 0x88). The IE1 flag bit in the TCON SFR is

not affected. The Interrupt 1 interrupt needs to be serviced

and acknowledged prior to entering PSM2 mode.

Rx2 Edge

RXPROG[1:0] = 11

PERIPH[7]

(RX2FG)

An Rx edge event occurs if a rising or falling edge is detected

on the RxD2 line. The UART2 RxD flag needs to be cleared

prior to entering PSM2 mode.

External Reset

RESET

Nonmaskable

If the RESET pin is brought low while the ADE5166/ADE5169

are in PSM2 mode, they wake up to PSM1 mode.

LCD

The LCD can be enabled/disabled in PSM2 mode. The LCD

data memory remains intact.

Scratch Pad

The four SCRATCHx registers remain intact in PSM2 mode.

1 All I/O pins are treated as inputs. The weak pull-up on each I/O pin can be disabled individually in the Port 0 weak pull-up enable SFR (PINMAP0, Address 0xB2), Port 1

weak pull-up enable SFR (PINMAP1, Address 0xB3), and Port 2 weak pull-up enable SFR (PINMAP2, Address 0xB4) to decrease current consumption. The interrupts can

be enabled or disabled.

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