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ADE5166/ADE5169

Rev. 0 | Page 99 of 148

FLASH MEMORY

FLASH MEMORY OVERVIEW

Flash memory is a type of nonvolatile memory that is in-circuit

programmable. The default, erased state of a byte of flash memory

is 0xFF. When a byte of flash memory is programmed, the required

bits change from 1 to 0. The flash memory must be erased to turn

the 0s back to 1s. A byte of flash memory cannot, however, be

erased individually. The entire segment, or page, of flash

memory that contains the byte must be erased.

The ADE5166/ADE5169 provide 62 bytes of flash program/

information memory. This memory is segmented into 124 pages

that each contain 512 bytes. To reprogram one byte of flash

memory, the 511 other bytes in that page must be erased. The

flash memory can be erased by page or all at once in a mass erase.

There is a command to verify that a flash write operation has

completed successfully. The ADE5166/ADE5169 flash memory

controller also offers configurable flash memory protection.

The 62 bytes of flash memory are provided on-chip to facilitate

code execution without any external discrete ROM device require-

ments. The program memory can be programmed in-circuit,

using the serial download mode provided or using conventional

third party memory programmers.

Flash/EE Memory Reliability

The flash memory arrays on the ADE5166/ADE5169 are fully

qualified for two key Flash/EE memory characteristics:

Flash/EE memory cycling endurance and Flash/EE memory

data retention.

Endurance quantifies the ability of the Flash/EE memory to be

cycled through many program, read, and erase cycles. In real

terms, a single endurance cycle is composed of four independent,

sequential events, as follows:

Initial page erase sequence

Read/verify sequence

Byte program sequence

Second read/verify sequence

In reliability qualification, every byte in both the program and

data Flash/EE memory is cycled from 0x00 to 0xFF until a first

fail is recorded, signifying the endurance limit of the on-chip

Flash/EE memory.

As indicated in Table 4, the ADE5166/ADE5169 flash memory

endurance qualification has been carried out in accordance with

JEDEC Standard 22 Method A117 over the industrial temperature

range of −40°C, +25°C, and +85°C. The results allow the specifica-

tion of a minimum endurance figure over supply and temperature

of 100,000 cycles, with a minimum endurance figure of 20,000

cycles of operation at 25°C.

Retention is the ability of the flash memory to retain its

programmed data over time. Again, the parts have been

qualified in accordance with the formal retention lifetime

specification, JEDEC Standard 22 Method A117, at a specific

junction temperature (TJ = 55°C). As part of this qualification

procedure, the flash memory is cycled to its specified endurance

limit, as described previously, before data retention is charac-

terized. This means that the flash memory is guaranteed to retain

its data for its full specified retention lifetime every time the

flash memory is reprogrammed. It should also be noted that

retention lifetime, based on an activation energy of 0.6 eV,

derates with TJ, as shown in Figure 87.

TJ JUNCTION TEMPERATURE (°C)

250

200

150

100

110

300

100

ANALOG DEVICES

SPECIFICATION

100 YEARS MIN.

AT TJ = 55°C

Figure 87. Flash/EE Memory Data Retention

FLASH MEMORY ORGANIZATION

The ADE5166/ADE5169 contain a 64 kB array of Flash/EE

program memory. The upper 2 kB contain permanently embedded

firmware, allowing in-circuit serial download, serial debug, and

nonintrusive single-pin emulation. The 2 kB of embedded firm-

ware also contains essential coefficients that provide calibration

to peripherals such as the ADCs and reference. The embedded

firmware contained in the upper 2 kB of Flash/EE memory is

not accessible by the user.

EMBEDDED DOWNLOAD/DEBUG KERNEL

PERMANENTLY EMBEDDED FIRMWARE ALLOWS

CODE TO BE DOWNLOADED TO ANY OF THE

62 kB OF ON-CHIP PROGRAM MEMORY.

THE KERNEL PROGRAM APPEARS AS NOP

INSTRUCTIONS TO USER CODE.

62 kB OF FLASH/EE PROGRAM MEMORY

ARE AVAILABLE TO THE USER. ALL OF THIS

SPACE CAN BE PROGRAMMED FROM THE

PERMANENTLY EMBEDDED DOWNLOAD/DEBUG

KERNEL OR IN PARALLEL PROGRAMMING MODE.

USER PROGRAM MEMORY

0×FFFF

2kB

0×F800

0×F7FF

62kB

0×0000

Figure 88. Flash Memory Organization

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