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ADE5166 数据表(PDF) 102 Page - Analog Devices |
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ADE5166 数据表(HTML) 102 Page - Analog Devices |
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102 / 148 page  ADE5166/ADE5169 Rev. 0 | Page 102 of 148 ECON—Flash Control SFR Programming flash memory is done through the flash control SFR (ECON, Address 0xB9). This SFR allows the user to read, write, erase, or verify the 62 kB of flash memory. As a method of security, a key must be written to the flash key SFR (FLSHKY, Address 0xBA) to initiate any user access to the flash memory. Upon completion of the flash memory operation, the FLSHKY SFR is reset such that it must be written to before another flash memory operation. Requiring the key to be set before an access to the flash memory decreases the likelihood of user code or data being overwritten by a runaway program. The program counter, PC, is held on the instruction where the ECON SFR is written to until the flash memory controller is done performing the requested operation. Then the PC incre- ments to continue with the next instruction. Any interrupt requests that occur while the flash controller is performing an operation are not handled until the flash operation is complete. All peripherals, such as timers and counters, continue to operate as configured throughout the flash memory access. Table 104. Flash Control SFR (ECON, Address 0xB9) Bit Mnemonic Default Value Description [7:0] ECON 0 1 Write byte. The value in EDATA is written to the flash memory, at the page address given by EADRH (Address 0xC7) and EADRL (Address 0xC6). Note that the byte being addressed must be pre-erased. 2 Erase page. A 512-byte page of flash memory address is erased. The page is selected by the address in EADRH and EADRL. Any address in the page can be written to EADRH and EADRL to select it for erasure. 3 Erase all. All 62 kB of the available flash memory are erased. Note that this command is used during serial mode and parallel download mode but should not be executed by user code. 4 Read byte. The byte in the flash memory, addressed by EADRH and EADRL, is read into EDATA. 5 Reserved. 6 Reserved. 7 Reserved. 8 Protect code (see the Protecting the Flash Memory section). Table 105. Flash Key SFR (FLSHKY, Address 0xBA) Bit Mnemonic Default Description [7:0] FLSHKY 0xFF The content of this SFR is compared to the flash key, 0x3B. If the two values match, the next ECON operation is allowed (see the Protecting the Flash Memory section). Table 106. Flash Protection Key SFR (PROTKY, Address 0xBB) Bit Mnemonic Default Description [7:0] PROTKY 0xFF The content of this SFR is compared to the flash memory location at Address 0xF7EA. If the two values match, the update of the write/erase and read protection set up is allowed (see the Protecting the Flash Memory section). If the protection key in the flash is 0xFF, the PROTKY SFR value is not used for comparison. The PROTKY SFR is also used to write the protection key in the flash. This is done by writing the desired value in PROTKY and writing 0x08 in the ECON SFR. This operation can be done only once. Table 107. Flash Data SFR (EDATA, Address 0xBC) Bit Mnemonic Default Description [7:0] EDATA 0 Flash pointer data. Table 108. Flash Low Byte Address SFR (EADRL, Address 0xC6) Bit Mnemonic Default Description [7:0] EADRL 0 Flash pointer low byte address. Table 109. Flash High Byte Address SFR (EADRH, Address 0xC7) Bit Mnemonic Default Description [7:0] EADRH 0 Flash pointer high byte address. |
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