ST72371 datasheet(72/94 Pages) STMICROELECTRONICS

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ST72371/ST72372

PWM/BRM GENERATOR (Cont’d)

4.6.4 Register Description

4.6.4.1 10-bit PWM/BRM REGISTERS

On a channel basis, the 10 bits are separated into

two data registers:

– A 6-bit PWM register corresponding to the binary

weight of the PWM pulse.

– A 4-bit BRM register defining the intervals where

an incremental pulse is added to the beginning of

the original PWM pulse. Two BRM channel val-

ues share the same register.

Note: The number of PWM and BRM channels

available depends on the device. Refer to the de-

vice pin description and register map.

PWM[1:8] REGISTERS

Read/Write

Reset Value 1000 0000 (80h)

Bit 7 = Reserved (read as “1”)

Bit 6 = POL

Polarity Bit.

When POL is set, output signal polarity is inverse;

otherwise, no change occurs.

Bits 5:0 = P[5:0] PWM Pulse Binary Weight for

channel i .

BRM REGISTERS

BRM21 (Channels 2 + 1)

BRM43 (Channels 4 + 3)

BRM65 (Channels 6 + 5)

BRM87 (Channels 8 + 7)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:4 = B[7:4]

BRM Bits (channel i+1)

Bits 3:0 = B[3:0]

BRM Bits (channel i)

4.6.4.2 12-bit PWM/BRM REGISTERS

The 12 bits are separated into two data registers:

– A 6-bit PWM register corresponding to the binary

weight of the PWM pulse.

– A 6-bit BRM register defining the intervals where

incremental pulses are added to the beginning of

the original PWM pulse.

PWM0 REGISTER

Read/ Write

Reset Value: 1000 0000 (80h)

Bit 7 = Reserved (read as “1”)

Bit 6 = POL

Polarity Bit.

When POL is set, output signal polarity is inverse;

otherwise, no change occurs.

Bits 5:0 = P[5:0]

PWM Pulse Binary Weight

BRM0 REGISTER

Read/ Write

Reset Value: 1100 0000 (C0h)

Bits 7:6 = Unused

Bits 5:0 = B[5:0] BRM Bits

POL

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