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EP1M350 数据表(PDF) 84 Page - Altera Corporation |
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EP1M350 数据表(HTML) 84 Page - Altera Corporation |
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84 / 86 page ![]() 84 Altera Corporation Mercury Programmable Logic Device Family Data Sheet Before and during device configuration, all I/O pins are pulled to VCCIO by a built-in weak pull-up resistor. SRAM configuration elements allow Mercury devices to be reconfigured in-circuit by loading new configuration data into the device. Real-time reconfiguration is performed by forcing the device into command mode with a device pin, loading different configuration data, reinitializing the device, and resuming user-mode operation. In-field upgrades can be performed by distributing new configuration files. Configuration Schemes The configuration data for a Mercury device can be loaded with one of five configuration schemes (see Table 52), chosen on the basis of the target application. A configuration device, intelligent controller, or the JTAG port can be used to control the configuration of a Mercury device. When a configuration device is used, the system can configure automatically at system power-up. By connecting the configuration enable (nCE) and configuration enable output (nCEO) pins on each device, multiple Mercury devices can be configured in any of five configuration schemes. f For more information on configuration, see Application Note 116 (Configuring APEX 20K, FLEX 10K & FLEX 6000 Devices). Device Pin- Outs See the Altera web site (http://www.altera.com) or the Altera Digital Library for pin-out information. Table 52. Data Sources for Configuration Configuration Scheme Data Source Configuration device Configuration device Passive serial (PS) MasterBlasterTM or ByteBlasterMVTM download cable or serial data source Passive parallel asynchronous (PPA) Parallel data source Passive parallel synchronous (PPS) Parallel data source JTAG MasterBlaster or ByteBlasterMV download cable or a microprocessor with a Jam STAPL or JBC file |
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