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EP1M350 数据表(PDF) 36 Page - Altera Corporation |
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EP1M350 数据表(HTML) 36 Page - Altera Corporation |
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36 / 86 page ![]() 36 Altera Corporation Mercury Programmable Logic Device Family Data Sheet Figure 18. RAM Memory Port Configurations Note to Figure 18: (1) Two dual- or single-port memory blocks can be implemented in a single ESB. The ESB also allows variable width data ports for reading and writing to any of the RAM ports in any RAM configuration. For example, the ESB in quad port configuration can be written in ×1 mode at port A, read in ×16 from port A, written in ×4 mode at port B, and read in ×2 mode from port B. dataA[] addressA[] wrenA clockA clockenA qA[] aclrA dataB[] addressB[] wrenB clockB clockenB qB[] aclrB AB data[] wraddress[] wren inclock inclocken inaclr rdaddress[] rden q[] outclock outclocken outaclr data[] address[] wren inclock inclocken inaclr q[] outclock outclocken outaclr True Dual-Port Memory Single-Port Memory (1) Dual-Port Memory (1) |
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