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数据搜索系统，热门电子元器件搜索 |
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EP1M350 数据表(PDF) 38 Page - Altera Corporation |
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EP1M350 数据表(HTML) 38 Page - Altera Corporation |
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38 / 86 page  38 Altera Corporation Mercury Programmable Logic Device Family Data Sheet The ESB implements two forms of clocking modes for quad-port and dual-port memory—read/write clock mode and input/output clock mode. Read/Write Clock Mode An ESB implementing quad-port memory in read/write clock mode can use up to four clocks. For port A, one clock controls all registers associated with writing: data input, WE, and write address. The other clock controls all registers associated with reading: read enable (RE), read address, and data output. Another set of clocks can be used for port B of the RAM, or the same clocks can be used. Each ESB port, A or B, also supports independent read clock enable, write clock enable, and asynchronous clear signals. Read/write clock mode is commonly used for applications where reads and writes occur at different system frequencies. Figure 19 shows the ESB in read/write clock mode. |
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