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EP1M350 数据表(PDF) 10 Page - Altera Corporation |
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EP1M350 数据表(HTML) 10 Page - Altera Corporation |
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10 / 86 page ![]() 10 Altera Corporation Mercury Programmable Logic Device Family Data Sheet Figure 3. Transmitter Diagram for Source Synchronous Mode Notes (1), (2) Notes to Figure 3: (1) EP1M350 devices have 18 individual transmitter channels. EP1M120 devices have 8 individual transmitter channels. (2) W = 1 to 12, 14, 16, 18, or 20 B = 1 to 12, 14, 16, 18, or 20 J = 4, 7, 8, 9 to 12, 14, 16, 18, or 20 W, B, and J do not have to be equal. (3) This clock pin drives an HSDI PLL only. It does not drive to the logic array. The Mercury device’s source-synchronous mode also supports the RapidIO interface protocol at up to 500 Mbps using the LVDS I/O standard. f For more information on source synchronous interfacing see AN 159: Using HSDI in Source-Synchronous Mode in Mercury Devices. Transmitter Channel HSDI_CLK1 (3) Global Clock from Receiver or System Clock HSDI PLL1 ×W × 1 J Serializer Data from LEs Transmitter Channel 1 J Bits Wide Transmitter Channel Transmitter Channel 2 Transmitter Channel Transmitter Channel 8 TXOUTCLOCK W B |
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