ADP2116ACPZ-R7 datasheet(28/36 Pages) AD

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ADP2116

Rev. 0 | Page 28 of 36

ZCOMP(s) is the impedance of the RC compensation network that

forms a pole at origin and a zero as expressed in Equation 13.

CONTROL LOOP COMPENSATION

The ADP2116 uses a peak current-mode control architecture

for excellent load and line transient response. The external

voltage loop is compensated by a transconductance amplifier

with a simple external RC network between the COMP1 or

COMP2 pin and GND, as shown in Figure 69.

COMP

(s)

(13)

ZFILT

(s) is the impedance of the output filter and is expressed as

OUT

LOAD

FILT

(s)

(14)

VFBx

0.6V

ADP2116

COMPx

RCOMP

CCOMP

CC2

GND

where s is the angular frequency that can be written as s = 2πf.

The overall loop gain, H(s), is obtained by multiplying the three

transfer functions previously mentioned as follows:

H(s) = gm × GCS ×

OUT

REF

× ZCOMP(s) × ZFILT(s)

(15)

Figure 69. Compensation Components

When the switching frequency (fSW), output voltage (VOUT), output

inductor (L), and output capacitor (COUT) values are selected,

the unity crossover frequency of approximately 1/12 the

switching frequency can be targeted.

The basic control loop block diagram is shown in Figure 70. The

blocks and components shown enclosed within the dashed line in

Figure 70 are embedded inside each channel of the ADP2116.

VCOMP

CCOMP

RCOMP

VREF = 0.6V

VIN

PULSE-

WIDTH

MODULATOR

VOUT

INDUCTOR

CURRENT

SENSE

ADP2116

At the crossover frequency, the gain of the open-loop transfer

function is unity. This yields Equation 16 for the compensation

network impedance at the crossover frequency.

REF

OUT

CROSS

COMP

)

(

(16)

To ensure that there is sufficient phase margin at the crossover

frequency, set the compensator zero to 1/8 of the crossover

frequency, as indicated in Equation 17.

CROSS

COMP

ZERO

≈

(17)

Figure 70. Basic Control Loop Block Diagram

Solving Equation 16 and Equation 17 yields the values for the

compensation resistor and the compensation capacitor, as shown

in Equation 18 and Equation 19.

The control loop can be broken down into the following three

sections:

•

VOUT to VCOMP

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

REF

OUT

CROSS

COMP

)

(

(18)

•

VCOMP to IL

•

IL to VOUT

Correspondingly, there are three transfer functions:

(s)

COMP

OUT

REF

OUT

COMP

(10)

COMP

ZERO

COMP

(19)

COMP

(s)

(11)

(s)

FILT

OUT

(12)

Capacitor CC2 (as shown in Figure 69) forms a pole with the

compensation resistor, RCOMP, in the feedback loop to ensure

that the loop gain continues to decrease, or roll off, well beyond

the unity-gain crossover frequency. The value of CC2, if used, is

typically set to 1/40 of the compensation capacitor, CCOMP.

where:

s is the angular frequency that can be written as s = 2πf.

gm is the transconductance of the error amplifier, 550 μS.

GCS is the current-sense gain, 4 A/V.

VOUT is the output voltage of the converter.

VREF is the internal reference voltage, 0.6 V.

ZCOMP is the impedance of the RC compensation network.

ZFILT is the impedance of the output filter.

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