ADP2116ACPZ-R7 datasheet(34/36 Pages) AD

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ADP2116

Rev. 0 | Page 34 of 36

POWER DISSIPATION AND THERMAL CONSIDERATIONS

Power dissipated by the ADP2116 dual switching regulator is a

major factor that affects the efficiency of the two dc-to-dc

converters. The efficiency is given by

Transition losses occur because the P-channel power MOSFET

cannot be turned on or off instantaneously. The amount of

transition loss is calculated by

100%

OUT

Efficiency

(21)

PTRAN = VIN × IOUT × (tRISE + tFALL) × fSW

(26)

where tRISE and tFALL are the rise time and the fall time of the

switching node. In the ADP2116, the rise and fall times of the

switching node are in the order of 5 ns.

where:

PIN is the input power.

POUT is the output power.

The power dissipated by the regulator increases the die junction

temperature, TJ, above the ambient temperature, TA.

The difference between the input power and the output power

is the power loss given by

TJ = TA + TR

(27)

PLOSS = PIN − POUT

where the temperature rise, TR, is proportional to the power

dissipation in the package, PD.

The power loss of the step-down dc-to-dc converter is

approximated by

PLOSS = PD + PL

(22)

The proportionality coefficient is defined as the thermal resistance

from the junction of the die to the ambient temperature.

TR = θJA × PD

(28)

where:

PD is the power dissipation on the ADP2116.

PL is the inductor power losses.

where

θJA is the junction ambient thermal resistance (34°C/W

for the JEDEC 1S2P board; see Table 2).

The inductor losses are estimated (without core losses) by

IOUT2 × DCRL

(23)

≅

When designing an application for a particular ambient

temperature range, calculate the expected ADP2116 power

dissipation (PD) due to conductive, switching, and transition

losses of both channels by using Equation 24, Equation 25,

and Equation 26, and estimate the temperature rise by using

Equation 27 and Equation 28. The reliable operation of the

two converters can be achieved only if the estimated die junction

temperature of the ADP2116 (Equation 27) is less than 125°C.

Therefore, at higher ambient temperatures, reduce the power

dissipation of the system. Figure 75 shows the power derating for

elevated ambient temperatures at various airflow conditions. The

area below the curves is the safe operation area for the ADP2116

dual regulators.

where:

IOUT is the dc load current.

DCRL is the inductor series resistance.

The ADP2116 power dissipation, PD, includes the power switch

conductive losses, the switch losses, and the transition losses of

each channel.

The power switch conductive losses are due to the output current

(IOUT) flowing through the P-channel MOSFET and the N-channel

MOSFET power switches that have internal resistance (RDSON).

The amount of conductive power loss can be calculated by

PCOND = [RDSON-P × D + RDSON-N × (1 − D)] × IOUT2

(24)

where:

D is the duty cycle, determined by D = VOUT/VIN.

RDSON-P is the internal resistance of the P-channel MOSFET.

RDSON-N is the internal resistance of the N-channel MOSFET.

Switching losses are associated with the current drawn by the

driver to turn the power of the devices on and off at the switching

frequency. The amount of switching power loss is given by

PSW = (CGATE-P + CGATE-N) × VIN2 × fSW

(25)

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

115

100

AMBIENT TEMPERATURE (°C)

AIR VELOCITY = 0 LFM

AIR VELOCITY = 200 LFM

AIR VELOCITY = 500 LFM

where:

CGATE-P is the P-channel MOSFET gate capacitance.

CGATE-N is the N-channel MOSFET gate capacitance.

Figure 75. Power Dissipation Derating (JEDEC 1S2P Board)

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