ADP2116ACPZ-R7 datasheet(29/36 Pages) AD

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ADP2116

Rev. 0 | Page 29 of 36

DESIGN EXAMPLE

The external component selection procedure from the Control

Loop Compensation section is used for this design example.

Table 9. 2-Channel, Step-Down DC-to-DC Converter

Requirements

Parameter

Specification

Additional

Requirements

Input Voltage, VIN

5.0 V ±10%

None

Output Voltage for

Channel 1, VOUT1

2.5 V, 3 A,

1% VOUT p-p ripple

Maximum load

step: 1.5 A to 3 A,

5% droop maximum

Output Voltage for

Channel 2, VOUT2

1.2 V, 3 A,

1% VOUT p-p ripple

Maximum load

step: 1.5 A to 3 A,

5% droop maximum

Pulse Skip Feature

Enabled

None

CHANNEL 1 CONFIGURATION AND COMPONENTS

SELECTION

Complete the following steps to configure Channel 1:

For a target output voltage (VOUT) of 2.5 V, connect the

V1SET pin through a 27 kΩ resistor to GND (see Table 4).

Because one of the fixed output voltage options is chosen,

the feedback pin (FB1) must be connected directly to the

output of Channel 1, VOUT1.

Estimate the duty cycle (D) range. Ideally,

OUT

D =

(20)

Therefore, for an output voltage of 2.5 V and a nominal

input voltage (VIN) of 5.0 V, the nominal duty cycle (DNOM)

is 0.5. Using the maximum input voltage (10% greater than

the nominal, or 5.5 V) results in the minimum duty cycle

(DMIN) of 0.45, whereas using the minimum input voltage

(10% less than the nominal, or 4.5 V) results in the maximum

duty cycle (DMAX) of 0.56.

However, the actual duty cycle will be larger than the

calculated values to compensate for the power losses in the

converter. Therefore, add 5% to 7% to the value calculated

for the maximum load.

Based on the estimated duty cycle range, choose the

switching frequency (fSW) according to the minimum and

maximum duty cycle limitations, as shown in Figure 64.

If the input voltage (VIN) is 5 V and the output voltage (VOUT)

is 2.5 V for Channel 1, choose a switching frequency of

600 kHz with a maximum duty cycle of 0.8. This frequency

option provides the smallest sized solution. If a higher

efficiency is required, choose the 300 kHz option. However,

the actual PCB footprint area of the converter will be larger

because of the bigger inductor and output capacitors.

Select the inductor by using the following equation:

OUT

−

)

(

In this equation, VIN = 5 V, VOUT = 2.5 V, ΔIL = 0.3 × IL = 0.9 A,

and fSW = 600 kHz, which results in L = 2.32 μH.

Therefore, when L = 3.3 μH (the closest minimum

standard value from Table 8) in Equation 5, ΔIL = 0.63 A.

Although the maximum output current required is 3 A,

the maximum peak current is 4.5 A for the current-limit

condition (see Table 7). Therefore, the inductor should be

rated for a peak current of 4.5 A and an average current of

3 A for reliable circuit operation.

Select the output capacitor by using the following equations:

)

(

ESR

ΔI

ΔV

ΔI

RIPPLE

OUT_MIN

−

≅

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

≅

DROOP

OUT_STEP

OUT_MIN

ΔV

ΔI

The first equation is based on the output ripple (ΔVRIPPLE),

whereas the second equation is based on the transient load

performance requirements that allow, in this case, 5% maxi-

mum deviation. As previously mentioned, perform these

calculations and then choose a capacitor based on the larger

calculated capacitor size.

In this case, the following values are used:

ΔIL = 0.63 A

fSW = 600 kHz

ΔVRIPPLE = 25 mV (1% of 2.5 V)

ESR = 3 mΩ (typical for ceramic capacitors)

ΔIOUT_STEP = 1.5 A

ΔVDROOP = 0.125 V (5% of 2.5 V)

Therefore, the output ripple based calculation dictates that

COUT = 6.2 μF, whereas the transient load based calculation

dictates that COUT = 60 μF. To meet both requirements, use

the larger capacitor value. As previously mentioned in the

Output Capacitor Selection section, the capacitance value

decreases when dc bias is applied; therefore, select a higher

value. In this case, the next higher value is 69 μF (a 47 μF

capacitor in parallel with 22 μF) with a minimum voltage

rating of 6.3 V.

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