ADP2116ACPZ-R7 datasheet(24/36 Pages) AD

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ADP2116

Rev. 0 | Page 24 of 36

SETTING THE OSCILLATOR FREQUENCY

The ADP2116 channels can be set to operate in one of three

preset switching frequencies: 300 kHz, 600 kHz, or 1.2 MHz.

For 300 kHz operation, connect the FREQ pin to GND. For

600 kHz or 1.2 MHz operation, connect a resistor between the

FREQ pin and GND (see Table 5).

Table 5. Oscillator Frequency Setting

RFREQ ± 5%

fSW (kHz)

0 Ω to GND

300

8.2 kΩ to GND

600

27 kΩ to GND

1200

The choice of the switching frequency depends on the required dc-

to-dc conversion ratio and the need for small external components.

In addition, due to the minimum on and off times required for

current sensing and robust operation, the frequency is limited

by the minimum and maximum controllable duty cycle (see

Figure 64).

100

200

400

600

800

1000

1200

SWITCHING FREQUENCY (kHz)

MAXIMUM LIMIT

MINIMUM LIMIT, VIN = 2.75V

MINIMUM LIMIT, VIN = 3.3V

MINIMUM LIMIT, VIN = 5.5V

Figure 64. Duty Cycle Working Limits

For small, area-limited power solutions, use of higher switching

frequencies is recommended. For single-output, multiphase

applications that operate at close to 50% duty cycle, use a 1.2 MHz

switching frequency to minimize crosstalk between the phases.

SYNCHRONIZATION AND CLKOUT

The ADP2116 can be configured to output an internal clock or

to synchronize to an external clock at the SYNC/CLKOUT pin.

The SYNC/CLKOUT pin is a bidirectional pin configured by

the SCFG pin (see Table 6).

Table 6. SYNC/CLKOUT Configuration Setting

SCFG

SYNC/CLKOUT

GND

Input (SYNC)

VDD

Output (CLKOUT)

The converter switching frequency, fSW, is half of the synchro-

nization frequency, fSYNC or fCLKOUT, as shown in Equation 4,

irrespective of whether SYNC/CLKOUT is configured as an

input or an output.

fSYNC (or fCLKOUT) = 2 × fSW

(4)

An external clock can be applied to the SYNC/CLKOUT pin when

configured as an input to synchronize multiple ADP2116 devices

to the same external clock. The fSYNC range is 400 kHz to 4 MHz,

which produces fSW in the 200 kHz to 2 MHz range (see Figure 65).

VDD

SYNC

SCFG

FREQ

27k

Ω

(

fSW = fSYNC/2)

ADP2116

VDD

SYNC

SCFG

FREQ

27k

Ω

(

fSW = fSYNC/2)

ADP2116

TO OTHER ADP2116 DEVICES

VIN

fSYNC

EXTERNAL CLOCK (2.4MHz)

Figure 65. Synchronization with External Clock (fSW = 1.2 MHz)

When synchronizing to an external clock, the switching frequency

(fSW) must be set close to half of the expected external clock fre-

quency by appropriately terminating the FREQ pin (see Table 5).

The ADP2116 can also be configured to output a clock signal on

the SYNC/CLKOUT pin that can be used to synchronize multiple

ADP2116 devices (see Figure 66). The CLKOUT signal is 90°

phase shifted relative to the internal clock of the channels so

that the master ADP2116 and the slave channels are out of

phase (see Figure 67 for additional information).

VDD

SYNC

SCFG

FREQ

8.2k

Ω

(

fSW = fSYNC/2)

ADP2116

VDD

CLKOUT

SCFG

FREQ

8.2k

Ω

(

fCLKOUT = 2 × fSW)

ADP2116

VIN

fSYNC = 2 × fSW

TO OTHER ADP2116 DEVICES

Figure 66. ADP2116 to Synchronize with Another ADP2116

(fSW = 600 kHz; the SCFG Pin of the Master Is Tied to VDD)

CH3 5.0V

CH1 5.0V

CH4 5.0V

M1.0µs

A CH4

3.00V

CHANNEL 1 SW

CHANNEL 2 SW

INTERNAL CLKOUT

Figure 67. CLKOUT Waveforms

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