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DM9013 数据表(PDF) 18 Page - Davicom Semiconductor, Inc. |
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DM9013 数据表(HTML) 18 Page - Davicom Semiconductor, Inc. |
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18 / 75 page ![]() DM9013 3-port switch with Processor Interface 18 Preliminary datasheet DM9013-15-DS-P03 April 9, 2009 5.10.2 Strap pin in 2-port mode Pin No. Pin Name Description 50, 51 EECK EEDO DATA Bus Width EECK EEDO data width 0 0 16-bit 0 1 32-bit 1 0 8-bit 1 1 reserved 52 EECS 0: use internal system clock 1: use SCLK as system clock 55 MDC Polarity of IRQ 0: IRQ pin high active 1: IRQ pin low active; 58 TXD2_3 ISA pin control 0: GP6/5 as normal general purpose pins 1: GP6 as IO16, GP5 as IOWAIT used in ISA bus only 59 TXD2_2 Port 2 in force mode GP4 : 0 strap as link status, : 1 strap as not link status, GP3 : 0 strap as full-duplex status, : 1 strap as half-duplex status, GP2 : 0 strap as speed100 status, : 1 strap as speed10 status. 60,61 TXD2_1,0 TXD2_1 TXD2_0 Port 2 mode 0 0 P2 is MII mode (Default) 0 1 P2 is in reverse MII mode 1 0 P2 is in RMII mode 1 1 reserved 63 TXEN2 0: port 2 disabled 1: port 1 disabled |
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