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CS4294/CS4298 数据表(PDF) 52 Page - Cirrus Logic |
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CS4294/CS4298 数据表(HTML) 52 Page - Cirrus Logic |
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52 / 66 page  CS4202 52 DS549PP2 the part behaves as specified in AC ’97. As shown in Figure 24, if the HPCFG pin is grounded, the part be- haves as if HP_OUT was the only output. In this case, LINE_OUT will be muted, the Master Volume Register (Index 02h) will control HP_OUT and PC_BEEP will be routed to HP_OUT during RE- SET. 10.2.2 Mono Output The mono output, MONO_OUT, can be either a sum of the left and right output channels, attenuated by 6 dB to prevent clipping at full scale, or the selected Mic signal. The mono out channel can drive the PC internal mono speaker using an appropriate buffer circuit. 10.3 Miscellaneous Analog Signals The AFLT1 and AFLT2 pins must have a 1000 pF NPO capacitor to analog ground. These capacitors provide a single-pole low-pass filter at the inputs to the ADCs. This makes low-pass filters at each analog input pin unnecessary. The REFFLT pin must have a short, wide trace to a 2.2 µF and a 0.1 µF capacitor connected to analog ground (see Figure 26 in Section 11, Grounding and Layout, for an example). The 2.2 µF capacitor must not be replaced by any other value (it may be re- placed with two 1 µF capacitors in parallel) and must be ceramic with low leakage current. Electrolytic ca- pacitors should not be used. No other connection should be made, as any coupling onto this pin will degrade the analog performance of the CS4202. Likewise, digital signals should be kept away from REFFLT for similar reasons. 10.4 Power Supplies The power supplies providing analog power should be as clean as possible to minimize coupling into the analog section which could degrade analog perfor- mance. The +5 V analog supply should be generated from a voltage regulator (7805 type) connected to a +12 V supply. This helps isolate the analog circuitry from noise typically found on +5 V digital supplies. A typical voltage regulator circuit for analog power using an MC78M05CDT is shown in Figure 25. One analog power pin, AVdd2, supplies power to the headphone amplifier on the CS4202. The other ana- log power pin, AVdd1, supplies power to the rest of the CS4202 analog circuitry. The digital power pins, DVdd1 and DVdd2, should be connected to the same HP_OUT_R HP_OUT_C HP_OUT_L 220 µF ELEC 220 µF ELEC 1 µF ELEC 10 k Ω 10 k Ω AGND AGND LINE_OUT_R LINE_OUT_L 10 µ F ELEC 10 µ F ELEC 220 k Ω 220 k Ω AGND AGND Headphone Jack Line Out Jack HPCFG 1000 pF 1000 pF AGND + + + + + Figure 23. Line Out and Headphone Out Setup HP_OUT_R HP_OUT_C HP_OUT_L 220 µF ELEC 220 µF ELEC 1 µF ELEC 10 k Ω 10 k Ω AGND AGND LINE_OUT_R LINE_OUT_L Line Out/ Headphone Jack HPCFG AGND + + + Figure 24. Line Out/Headphone Out Setup |
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