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CS4294/CS4298 数据表(PDF) 22 Page - Cirrus Logic |
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CS4294/CS4298 数据表(HTML) 22 Page - Cirrus Logic |
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22 / 66 page ![]() CS4202 22 DS549PP2 4.1 Reset Register (Index 00h) ID8 18-bit ADC Resolution. The ID8 bit is ‘set’, indicating this feature is present. ID7 20-bit DAC resolution. The ID7 bit is ‘set’, indicating this feature is present. ID4 Headphone Out. The ID4 bit is ‘set’, indicating this feature is present. The state of this bit de- pends on the state of the HPCFG pin. Default 0190h. The data in this register is read-only data. Any write to this register causes a Register Reset of the audio control (Index 00h - 3Ah) and Cirrus Logic defined (Index 5Ah - 7Ah) registers. A read from this register returns configuration information about the CS4202. 4.2 Analog Mixer Output Volume Registers (Index 02h - 04h) Mute Output Mute. Setting this bit mutes the LINE_OUT_L/R or HP_OUT_L/R output signals. ML[5:0] Output Volume Left. These bits control the left output volume. Each step corresponds to 1.5 dB gain adjustment, with a total available range from 0 dB to -46.5 dB attenuation. Setting the ML5 bit sets the left channel attenuation to -46.5 dB by forcing ML[4:0] to a ‘1’ state. ML[5:0] will read back 011111 when ML5 has been ‘set’. See Table 2 for further details. MR[5:0] Output Volume Right. These bits control the right output volume. Each step corresponds to 1.5 dB gain adjustment, with a total available range from 0 dB to -46.5 dB attenuation. Setting the MR5 bit sets the right channel attenuation to -46.5 dB by forcing MR[4:0] to a ‘1’ state. MR[5:0] will read back 011111 when MR5 has been ‘set’. See Table 2 for further details. Default 8000h. This value corresponds to 0 dB attenuation and Mute ‘set’. If the HPCFG pin is left floating, register 02h controls the Master Output Volume and register 04h controls the Head- phone Output Volume. If the HPCFG pin is tied ‘low’, register 02h controls the Headphone Volume and register 04h is a read-only register and always returns 0000h when ‘read’. D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 000 0000 ID8 ID7 0 0 ID4 0000 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Mute 0 ML5 ML4ML3 ML2ML1 ML0 0 0 MR5 MR4 MR3 MR2 MR1 MR0 Mx5 - Mx0 Write Mx5 - Mx0 Read Gain Level 000000 000000 0 dB 000001 000001 -1.5 dB … … ... 011111 011111 -46.5 dB 100000 011111 -46.5 dB ... ... ... 111111 011111 -46.5 dB Table 2. Analog Mixer Output Attenuation |
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