STA015 datasheet(34/56 Pages) STMICROELECTRONICS

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the default OCLK frequency is 12.288 MHz.

PLLFRAC_L ([7:0])

PLLFRAC_H ([15:8])

Address: 0x64 - 0x65 (100 - 101)

Type: R/W

Software Reset: 0x46 | 0x5B

Hardware Reset: 0xNA | 0x5B

The registers are considered logically concatenated and contain the fractional values for the PLL, used to

select the internal configuration. After Reset, the values are NA, and the operational setting are done when

the MPEG synchronisation is achieved.

The following formula describes the relationships among all the STA015 fractional PLL parameters:

where:

FRAC=256 x FRAC_H + FRAC_L (decimal)

These registers are a reference for 48 / 24 / 12 / 32 / 16 / 8KHz audio.

FRAME_CNT_L

FRAME_CNT_M

FRAME_CNT_H

MSB

LSB

PF7

PF6

PF5

PF4

PF3

PF2

PF1

PF0

MSB

LSB

PF15

PF14

PF13

PF12

PF11

PF10

PF9

PF8

MSB

LSB

FC7

FC6

FC5

FC4

FC3

FC2

FC1

FC0

MSB

LSB

FC15

FC14

FC13

FC12

FC11

FC10

FC9

FC8

MSB

LSB

FC23

FC22

FC21

FC20

FC19

FC18

FC17

FC16

OCLK_Freq

-------------

MCLK_Freq

------------------------------------

FRAC

65536

-----------------

⋅⋅

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