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STA015 数据表(PDF) 43 Page - STMicroelectronics |
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STA015 数据表(HTML) 43 Page - STMicroelectronics |
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43 / 56 page ![]() Obsolete Product(s) - Obsolete Product(s) 43/56 STA015 ADPCM_FRAME_SIZE Address: 0xBD (189) Type: R/W Software Reset: 0x13 Hardware Reset: 0x00 The ADPCM frame size may be adjusted to match a trade-off between the bitrate overhead and the frame length. The frame size (in bytes) is calculated as follow: FRAME size = (ADPCM_FRAME_SIZE * 90) +108 The frame starts with a 12 bytes header: – 6 bytes for DVI algorithm – 96 bytes for G726 pack algorithms ADPCM_INT_CFG Address: 0xBE (190) Type: R/W Software Reset: 0x0B Hardware Reset: 0x00 Using this register the ADPCM interrupt capability can be properly configured. INTL0 - INTL6 Interrupt Length he interrupt length can be programmed, using this bits, from 0 up to 128 system clock cycles GPIO_CONF Address: 0xBF (191) Type: R/W Software Reset: 0x00 Hardware Reset: 0x00 This register controls how data are strobed on the GPIO interface. GISP: GPIO Strobe Polarity in INPUT mode 0 = data strobed an falling edge 1 = data strobed on rising edge GOSP: GPIO Strobe Polarity in OUTPUT mode 0 = non inverted 1 = inverted MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 AFS7 AFS6 AFS5 AFS4 AFS3 AFS2 AFS1 AFS0 MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 INTL6 INTL5 INTL4 INTL3 INTL2 INTL1 INTL0 X MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 X XXXX X GOSP GISP |
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