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STA015 数据表(PDF) 47 Page - STMicroelectronics |
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STA015 数据表(HTML) 47 Page - STMicroelectronics |
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47 / 56 page  Obsolete Product(s) - Obsolete Product(s) 47/56 STA015 Thi min = 3ns Tlo min = 3ns Toclk min = 25ns tsdo = 5.5 + pad_timing (Cload_SDO) ns tsckt = 6 + pad_timing (Cload_SCKT) ns tlrckt = 5.5 + pad_timing (Cload_LRCKT) ns 6.3.2 Bitstream input interface (SDI, SCKR, BIT_EN) SCL_POL = 0 6.3.3 Bitstream input interface (SDI, SCKR, BIT_EN) SCL_POL = 1 tsdi_setup_min = 2ns tsdi_hold_min = 3ns tsckr_min_hi = 10ns tsckr_min_low = 10ns tsckr_min_lperiod = 50ns t_biten (min) = 2ns 6.3.4 SRC_INT This is an asynchronous input used in "broadcast’ mode. SRC_INT is active low t_src_low min duration is 50ns (1DSP clock period) t_src_high min duration is 50ns (1DSP clock period) SDI SCKR IGNORED VALID IGNORED t_biten t_biten tsdi_hold tsdi_setup D98AU971A tsckr_min_high BIT_EN SCLK_POL=0 tsckr_min_low tsckr_min_period SDI SCKR IGNORED IGNORED VALID IGNORED t_biten t_biten tsdi_hold tsdi_setup D99AU1038 tsckr_min_high BIT_EN SCLK_POL=4 tsckr_min_low tsckr_min_period SRC_INT D98AU972 t_src_hi t_src_low |
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