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STA015 数据表(PDF) 44 Page - STMicroelectronics

部件名 STA015
功能描述  MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY
PDF  56 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA015 数据表(HTML) 44 Page - STMicroelectronics

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ADC_WLEN
Address: 0xC0 (192)
Type: R/W
Software Reset: 0x0F
Hardware Reset: 0x0F
To select ADC word length AWL4 through AWL0 bits can be used.
This 5 bit value must contain the size of the significant data bits minus one.
ADC_WPOS
Address: 0xC1 (193)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
These bits specify the position of the sample word referred to the LRCK slot boundary.
Bit AWP0 thru AWP4 must be programmed with the number of bits to ignore after the sample word.
ADPCM_SKIP_FRAME
Address: 0xC2 (194)
Type: R/W
Software Reset:0x00
Hardware Reset: 0x00
This register is useful when decoding ADPCM frame-based streams in order to skip the specified number
of frames.
The content of the register will automatically be decremented on each new frame and the skip process will
continue until the content reaches zero.
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
X
X
X
AWL4
AWL3
AWL2
AWL1
AWL0
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
X
X
X
AWP4
AWP3
AWP2
AWP1
AWP0
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
ASF7
ASF6
ASF5
ASF4
ASF3
ASF2
ASF1
ASF0



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