L6460 datasheet(51/139 Pages) STMICROELECTRONICS

51 / 139 page

L6460

Main switching regulator

Doc ID 17713 Rev 1

51/139

Figure 11.

Main switching regulator functional blocks

In pulse skipping control the duty cycle must be chosen by the user depending on supply

voltage and output regulated voltage. Therefore the switching regulator has 4 possible duty

cycles that can be changed by writing the VmainSwSelPWM bits in the MainSwCfg register

according to following Table 10.

The output current is limited to a value that can be set by means of SelIlimit bit in the

MainSwCfg register according to following Table 11.

Table 10.

Main switching regulator PWM specification

MainSwCfg register

Duty cycle value

Comments

VmainSwSelPWM[1:0]

Typical

12%

15%

26%

Default state

63.5%

Table 11.

Main switching regulator current limit

SelIlimit

Current limit (min)

Comments

3.3A

Default state

12.3A

VSupply

High Side

Driver

Control

Logic

Current Sense

Charge pump Voltage

VSWmain_FB

Voltage

Loop Control

Regulator Ref

Under voltage

Threshold

Filter

From Central Logic

Regulator Freq

To Central Logic

Under voltage flag

VSWmain_SW

L6460 数据表(PDF) 51 Page - STMicroelectronics

L6460 数据表(HTML) 51 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载