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TMS320DM8167 数据表(PDF) 76 Page - Texas Instruments

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部件名 TMS320DM8167
功能描述  TMS320DM816x DaVinci Digital Media Processors
PDF  312 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TMS320DM8167 数据表(HTML) 76 Page - Texas Instruments

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TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614 – MARCH 2011
www.ti.com
Table 3-11. McASP2 Terminal Functions
SIGNAL
TYPE(1)
OTHER(2) (3)
MUXED
DESCRIPTION
NAME
NO.
MCA[2]_ACLKR/
PULL: IPD / IPD
MCB
MCB_CLKR/
AL34
I/O
DRIVE: Z / Z
McASP2 Receive Bit Clock I/O
PINCTRL148
MCB_DR
DVDD_3P3
PULL: IPD / IPD
MCA[2]_AHCLKR/
MCB
AM34
I/O
DRIVE: Z / Z
McASP2 Receive High-Frequency Master Clock I/O
MCB_CLKS
PINCTRL149
DVDD_3P3
MCA[2]_AFSR/
PULL: IPD / IPD
MCB
MCB_CLKX/
AM35
I/O
DRIVE: Z / Z
McASP2 Receive Frame Sync I/O
PINCTRL150
MCB_FSR
DVDD_3P3
GP0[5]/
PULL: IPD / IPD
GP0, GPMC
MCA[2]_AMUTEIN/
G2
I
DRIVE: Z / Z
McASP2 Mute Input
PINCTRL296
GPMC_A[24]
DVDD_3P3
PULL: IPD / IPD
MCA[2]_ACLKX/
MCB
AM36
I/O
DRIVE: Z / Z
McASP2 Transmit Bit Clock I/O
MCB_CLKX
PINCTRL151
DVDD_3P3
PULL: IPD / IPD
MCA[2]_AHCLKX/
MCB
AN36
I/O
DRIVE: Z / Z
McASP2 Transmit High-Frequency Master Clock I/O
MCB_CLKR
PINCTRL152
DVDD_3P3
MCA[2]_AFSX/
PULL: IPD / IPD
MCB
MCB_CLKS/
AN35
I/O
DRIVE: Z / Z
McASP2 Transmit Frame Sync I/O
PINCTRL153
MCB_FSX
DVDD_3P3
PULL: IPD / IPD
-
MCA[2]_AMUTE
AP36
O
DRIVE: Z / Z
McASP2 Mute Output
PINCTRL154
DVDD_3P3
PULL: IPD / IPD
MCA[2]_AXR[1]/
MCB
AR37
I/O
DRIVE: Z / Z
MCB_DX
PINCTRL156
DVDD_3P3
McASP2 Transmit/Receive Data I/Os
PULL: IPD / IPD
-
MCA[2]_AXR[0]
AR36
I/O
DRIVE: Z / Z
PINCTRL155
DVDD_3P3
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2)
PULL: A / B, where:
A is the state of the internal pull resistor during POR reset
B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset
IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled
DRIVE: A / B, where;
A is the driving state of the pin during POR reset
B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset
H = Driving High, L = Driving Low, Z = 3-State
For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see
Section 4.2.1, Pullup/Pulldown Resistors.
(3)
Specifies the operating I/O supply voltage for each signal.
76
Device Pins
Copyright © 2011, Texas Instruments Incorporated
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