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TMS320DM8167 数据表(PDF) 93 Page - Texas Instruments

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部件名 TMS320DM8167
功能描述  TMS320DM816x DaVinci Digital Media Processors
PDF  312 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TMS320DM8167 数据表(HTML) 93 Page - Texas Instruments

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TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
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SPRS614 – MARCH 2011
Table 3-25. Video Input 1 Terminal Functions
SIGNAL
TYPE(1)
OTHER(2) (3)
MUXED
DESCRIPTION
NAME
NO.
PULL: IPD / DIS
Video Input 1 Port A Clock input. Input clock for
VOUT[1]_CLK/
VOUT[1]
AT7
I
DRIVE: Z / Z
8-bit or 16-bit Port A video capture. Input data is
VIN[1]A_CLK
PINCTRL46
DVDD_3P3
sampled on the CLK0 edge.
Video Input 1 Port B Clock input. Input clock for
PULL: IPD / IPD
VOUT[1]_AVID/
VOUT[1]
8-bit Port B video capture. Input data is sampled
AT4
I
DRIVE: Z / Z
VIN[1]B_CLK
PINCTRL31
on the CLK1 edge. This signal is not used in
DVDD_3P3
16-bit capture modes.
PULL: IPD / IPD
VOUT[1]_HSYNC/
VOUT[1]
AR5
I
DRIVE: Z / Z
VIN[1]A_D[15]
PINCTRL21
DVDD_3P3
PULL: IPD / IPD
-
VIN[1]A_D[14]
AM3
I
DRIVE: Z / Z
PINCTRL11
DVDD_3P3
PULL: IPD / IPD
VOUT[1]_C[7]/
VOUT[1]
AD13
I
DRIVE: Z / Z
VIN[1]A_D[13]
PINCTRL10
DVDD_3P3
PULL: IPD / IPD
VOUT[1]_C[6]
VOUT[1]
Video Input 1 Port A Data inputs. For 16-bit
AN8
I
DRIVE: Z / Z
VIN[1]A_D[12]
PINCTRL9
capture, D[7:0] are Cb/Cr and [15:8] are Y Port A
DVDD_3P3
inputs. For 8-bit capture, D[7:0] are Port A YCbCr
PULL: IPD / IPD
data inputs and D[15:8] are Port B YCbCr data
VOUT[1]_C[5]/
VOUT[1]
AP8
I
DRIVE: Z / Z
inputs. For VIN[1], only D[15:0] are available.
VIN[1]A_D[11]
PINCTRL8
DVDD_3P3
PULL: IPD / IPD
VOUT[1]_C[4]/
VOUT[1]
AN7
I
DRIVE: Z / Z
VIN[1]A_D[10]
PINCTRL7
DVDD_3P3
PULL: IPD / IPD
VOUT[1]_C[3]/
VOUT[1]
AM8
I
DRIVE: Z / Z
VIN[1]A_D[9]
PINCTRL6
DVDD_3P3
PULL: IPD / IPD
VOUT[1]_C[2]/
VOUT[1]
AK6
I
DRIVE: Z / Z
VIN[1]A_D[8]
PINCTRL20
DVDD_3P3
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2)
PULL: A / B, where:
A is the state of the internal pull resistor during POR reset
B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset
IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled
DRIVE: A / B, where;
A is the driving state of the pin during POR reset
B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset
H = Driving High, L = Driving Low, Z = 3-State
For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see
Section 4.2.1, Pullup/Pulldown Resistors.
(3)
Specifies the operating I/O supply voltage for each signal.
Copyright © 2011, Texas Instruments Incorporated
Device Pins
93
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