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HT68FU50 数据表(PDF) 113 Page - Holtek Semiconductor Inc |
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HT68FU50 数据表(HTML) 113 Page - Holtek Semiconductor Inc |
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113 / 244 page  HT68F20/HT68F30/HT68F40/HT68F50/HT68F60 HT68FU30/HT68FU40/HT68FU50/HT68FU60 Rev. 1.50 113 March 15, 2011 Single Pulse Mode To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively and also the TnIO1 and TnIO0 bits should be set to 11 respectively. The Single Pulse Output Mode, as the name suggests, will generate a single shot pulse on the TM output pin. The trigger for the pulse output leading edge is a low to high transition of the TnON bit, which can be imple- mented using the application program. However in the Single Pulse Mode, the TnON bit can also be made to automatically change from low to high using the external TCKn pin, which will in turn initiate the Single Pulse out- put. When the TnON bit transitions to a high level, the counter will start running and the pulse leading edge will be generated. The TnON bit should remain high when the pulse is in its active state. The generated pulse trail- ing edge will be generated when the TnON bit is cleared to zero, which can be implemented using the application program or when a compare match occurs from Com- parator A. L e a d i n g E d g e T n O N b i t 0 ® 1 S / W C o m m a n d S E T " T n O N " o r T C K n P i n T r a n s i t i o n T n O N b i t 1 ® 0 S / W C o m m a n d C L R " T n O N " o r C C R A M a t c h C o m p a r e P u l s e W i d t h = C C R A V a l u e T r a i l i n g E d g e T M n O u t p u t P i n Single Pulse Generation Counter Value CCRP CCRA TnON TnPAU TnPOL CCRP Int. Flag TnPF CCRA Int. Flag TnAF TM O/P Pin (TnOC=1) Time Counter stopped by CCRA Pause Resume Counter Stops by software Counter Reset when TnON returns high TnM [1:0] = 10 ; TnIO [1:0] = 11 Pulse Width set by CCRA Output Inverts when TnPOL = 1 No CCRP Interrupts generated TM O/P Pin (TnOC=0) TCKn pin Software Trigger Cleared by CCRA match TCKn pin Trigger Auto. set by TCKn pin Software Trigger Software Clear Software Trigger Software Trigger Single Pulse Mode Note: 1. Counter stopped by CCRA 2. CCRP is not used 3. The pulse triggered by the TCKn pin or by setting the TnON bit high 4. A TCKn pin active edge will automatically set the TnON bit high. 5. In the Single Pulse Mode, TnIO [1:0] must be set to ²11² and can not be changed. |
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