AFS090 datasheet(145/334 Pages) MICROSEMI

145 / 334 page

Fusion Family of Mixed Signal FPGAs

R e visio n 2

2 - 129

ACM Characteristics1

MATCHREG1

Match register bits 15:8

RTC

MATCHREG2

Match register bits 23:16

RTC

MATCHREG3

Match register bits 31:24

RTC

MATCHREG4

Match register bits 39:32

RTC

MATCHBITS0

Individual match bits 7:0

RTC

MATCHBITS1

Individual match bits 15:8

RTC

MATCHBITS2

Individual match bits 23:16

RTC

MATCHBITS3

Individual match bits 31:24

RTC

MATCHBITS4

Individual match bits 39:32

RTC

CTRL_STAT

Control (write) / Status (read) register

bits 7:0

RTC

Note:

ACMADDR bytes 1 to 40 pertain to the Analog Quads; bytes 64 to 89 pertain to the RTC.

1. When addressing the RTC addresses (i.e., ACMADDR 64 to 89), there is no timing generator, and the rc_osc, byte_en, and

aq_wen signals have no impact.

Table 2-54 • ACM Address Decode Table for Analog Quad (continued)

ACMADDR [7:0] in

Decimal

Name

Description

Associated

Peripheral

Figure 2-95 • ACM Write Waveform

Figure 2-96 • ACM Read Waveform

SUEACM

HEACM

SUDACM

HDACM

SUAACM

HAACM

ACMCLK

ACMWEN

ACMWDATA

ACMADDRESS

RD0

RD1

MPWCLKACM

CLKQACM

ACMCLK

ACMADDRESS

ACMRDATA

AFS090 数据表(PDF) 145 Page - Microsemi Corporation

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