AFS090 datasheet(150/334 Pages) MICROSEMI

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Device Architecture

2- 13 4

R e v isio n 2

User I/Os

Introduction

Fusion devices feature a flexible I/O structure, supporting a range of mixed voltages (1.5 V, 1.8 V, 2.5 V,

and 3.3 V) through a bank-selectable voltage. Table 2-68, Table 2-69, Table 2-70, and Table 2-71 on

page 2-137 show the voltages and the compatible I/O standards. I/Os provide programmable slew rates,

drive strengths, weak pull-up, and weak pull-down circuits. 3.3 V PCI and 3.3 V PCI-X are 5 V–tolerant.

See the "5 V Input Tolerance" section on page 2-146 for possible implementations of 5 V tolerance.

All I/Os are in a known state during power-up, and any power-up sequence is allowed without current

impact. Refer to the "I/O Power-Up and Supply Voltage Thresholds for Power-On Reset (Commercial

and Industrial)" section on page 3-5 for more information. In low power standby or sleep mode (VCC is

OFF, VCC33A is ON, VCCI is ON) or when the resource is not used, digital inputs are tristated, digital

outputs are tristated, and digital bibufs (input/output) are tristated.

I/O Tile

The Fusion I/O tile provides a flexible, programmable structure for implementing a large number of I/O

standards. In addition, the registers available in the I/O tile in selected I/O banks can be used to support

high-performance register inputs and outputs, with register enable if desired (Figure 2-97 on

page 2-135). The registers can also be used to support the JESD-79C DDR standard within the I/O

structure (see the "Double Data Rate (DDR) Support" section on page 2-141 for more information).

As depicted in Figure 2-98 on page 2-140, all I/O registers share one CLR port. The output register and

output enable register share one CLK port. Refer to the "I/O Registers" section on page 2-140 for more

information.

I/O Banks and I/O Standards Compatibility

The digital I/Os are grouped into I/O voltage banks. There are three digital I/O banks on the AFS090 and

AFS250 devices and four digital I/O banks on the AFS600 and AFS1500 devices. Figure 2-111 on

page 2-160 and Figure 2-112 on page 2-161 show the bank configuration by device. The north side of

the I/O in the AFS600 and AFS1500 devices comprises two banks of Pro I/Os. The Pro I/Os support a

wide number of voltage-referenced I/O standards in addition to the multitude of single-ended and

differential I/O standards common throughout all Microsemi digital I/Os. Each I/O voltage bank has

dedicated I/O supply and ground voltages (VCCI/GNDQ for input buffers and VCCI/GND for output

buffers). Because of these dedicated supplies, only I/Os with compatible standards can be assigned to

the same I/O voltage bank. Table 2-69 and Table 2-70 on page 2-136 show the required voltage

compatibility values for each of these voltages.

For more information about I/O and global assignments to I/O banks, refer to the specific pin table of the

device in the "Package Pin Assignments" on page 4-1 and the "User I/O Naming Convention" section on

page 2-160.

Each Pro I/O bank is divided into minibanks. Any user I/O in a VREF minibank (a minibank is the region

of scope of a VREF pin) can be configured as a VREF pin (Figure 2-97 on page 2-135). Only one VREF

pin is needed to control the entire VREF minibank. The location and scope of the VREF minibanks can

be determined by the I/O name. For details, see the "User I/O Naming Convention" section on

page 2-160.

Table 2-70 on page 2-136 shows the I/O standards supported by Fusion devices and the corresponding

voltage levels.

I/O standards are compatible if the following are true:

•

Their VCCI values are identical.

•

If both of the standards need a VREF, their VREF values must be identical (Pro I/O only).

AFS090 数据表(PDF) 150 Page - Microsemi Corporation

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