| 数据搜索系统,热门电子元器件搜索 |
|
MPC5643L 数据表(PDF) 83 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC5643L 数据表(HTML) 83 Page - Freescale Semiconductor, Inc |
|
83 / 136 page ![]() Electrical characteristics MPC5643L Microcontroller Data Sheet, Rev. 8.1 Freescale Semiconductor 83 3.7 Static latch-up (LU) Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin. • A current injection is applied to each input, output and configurable I/O pin. These tests are compliant with the EIA/JESD 78 IC latch-up standard. 3.8 Voltage regulator electrical characteristics The voltage regulator is composed of the following blocks: • High power regulator HPREG1 (internal ballast to support core current) • High power regulator HPREG2 (external NPN to support core current) • Low voltage detector (LVD_MAIN_1) for 3.3 V supply to IO (VDDIO) • Low voltage detector (LVD_MAIN_2) for 3.3 V supply (VDDREG) • Low voltage detector (LVD_MAIN_3) for 3.3 V flash supply (VDDFLASH) • Low voltage detector (LVD_DIG_MAIN) for 1.2 V digital core supply (HPVDD) • Low voltage detector (LVD_DIG_BKUP) for the self-test of LVD_DIG_MAIN • High voltage detector (HVD_DIG_MAIN) for 1.2 V digital CORE supply (HPVDD) • High voltage detector (HVD_DIG_BKUP) for the self-test of HVD_DIG_MAIN. •Power on Reset (POR) HPREG1 uses an internal ballast to support the core current. HPREG2 is used only when external NPN transistor is present on board to supply core current. The MPC5643L always powers up using HPREG1 if an external NPN transistor is present. Then the MPC5643L makes a transition from HPREG1 to HPREG2. This transition is dynamic. Once HPREG2 is fully operational, the controller part of HPREG1 is switched off. The following bipolar transistors are supported: • BCP68 from ON Semiconductor • BCX68 from Infineon 3 Data based on characterization results, not tested in production. Table 16. Latch-up results No. Symbol Parameter Conditions Class 1 LU SR Static latch-up class TA = 125 °C conforming to JESD 78 II level A Table 17. Recommended operating characteristics Symbol Parameter Value Unit hFE( ) DC current gain (Beta) 85 - 375 — PD Maximum power dissipation @ TA=25°C 1 1.5 W ICMaxDC Maximum peak collector current 1.0 A VCESAT Collector-to-emitter saturation voltage(Max) 6002 mV VBE Base-to-emitter voltage (Max) 1.0 V |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |