MPC5643L datasheet(106/136 Pages) FREESCALE

106 / 136 page

MPC5643L Microcontroller Data Sheet, Rev. 8.1

Electrical characteristics

Freescale Semiconductor

106

Table 32. Reset sequence trigger — reset sequence

Reset

Sequence

Trigger

Reset

Sequence

Start

Condition

Reset

Sequence

End

Indication

Reset Sequence

Destructiv

e Reset

Sequence,

BIST

enabled1

1 Whether BIST is executed or not depends on the chip configuration data stored in the shadow sector of the NVM.

Destructiv

e Reset

Sequence,

BIST

disabled1

External

Reset

Sequenc

e Long,

BIST

enabled

Functiona

l Reset

Sequenc

e Long

Functiona

l Reset

Sequenc

e Short

All internal

destructive reset

sources

(LVDs or internal

HVD during

power-up and

during

operation)

Section 3.1

9.4.1,

Destructive

reset

Release of

RESET2

2 End of the internal reset sequence (as specified in Table 31) can only be observed by release of RESET if it is not

held low externally beyond the end of the internal sequence which would prolong the internal reset PHASE3 till

RESET is released externally.

triggers

cannot

trigger

cannot

trigger

cannot

trigger

Assertion of

RESET3

3 The assertion of RESET can only trigger a reset sequence if the device was running (RESET released) before.

RESET does not gate a Destructive Reset Sequence, BIST enabled or a Destructive Reset Sequence, BIST

disabled. However, it can prolong these sequences if RESET is held low externally beyond the end of the internal

sequence (beyond PHASE3).

Section 3.1

9.4.2,

External

reset via

RESET

cannot trigger

triggers4

4 If RESET is configured for long reset (default) and if BIST is enabled via chip configuration data stored in the

shadow sector of the NVM.

triggers5

5 If RESET is configured for long reset (default) and if BIST is disabled via chip configuration data stored in the

shadow sector of the NVM.

triggers6

6 If RESET is configured for short reset

All internal

functional reset

sources

configured for

long reset

Sequence

starts with

internal

reset

trigger

Release of

RESET7

7 Internal reset sequence can only be observed by state of RESET if bidirectional RESET functionality is enabled for

the functional reset source which triggered the reset sequence.

cannot trigger

cannot

trigger

triggers

cannot

trigger

All internal

functional reset

sources

configured for

short reset

cannot trigger

cannot

trigger

cannot

trigger

triggers

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