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MPC5643L 数据表(PDF) 117 Page - Freescale Semiconductor, Inc |
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MPC5643L 数据表(HTML) 117 Page - Freescale Semiconductor, Inc |
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117 / 136 page  Electrical characteristics MPC5643L Microcontroller Data Sheet, Rev. 8.1 Freescale Semiconductor 117 Figure 30. DSPI classic SPI timing — master, CPHA = 0 12 tHO D Data hold time for outputs Master (MTFE = 0) –2 — ns Slave 6 — Master (MTFE = 1, CPHA = 0) 6 — Master (MTFE = 1, CPHA = 1) –2 — 1 Slave Receive Only Mode can operate at a maximum frequency of 60 MHz. In this mode, the DSPI can receive data on SIN, but no valid data is transmitted on SOUT. Table 39. DSPI timing (continued) No. Symbol Parameter Conditions Min Max Unit Data Last Data First Data First Data Data Last Data SIN SOUT PCSx SCK Output 4 9 12 1 11 10 4 SCK Output (CPOL=0) (CPOL=1) 3 2 Note: The numbers shown are referenced in Table 39. |
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