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MMPF0100 数据表(PDF) 111 Page - Freescale Semiconductor, Inc |
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MMPF0100 数据表(HTML) 111 Page - Freescale Semiconductor, Inc |
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111 / 136 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 111 PF0100 Functional Block Requirements and Behaviors Control Interface I2C Block Description 7.5.5.2 Embedded Memory There are four register banks of general purpose embedded memory to store critical data. The data written to MEMA[7:0], MEMB[7:0], MEMC[7:0], and MEMD[7:0] is maintained by the coin cell when the main battery is deeply discharged, removed, or contact-bounced. The contents of the embedded memory are reset by COINPORB. The banks can be used for any system need for bit retention with coin cell backup. Table 130. Register FABID - ADDR 0x04 Name Bit # R/W Default Description FIN 1:0 R 0x00 Allows for characterizing different options within the same reticule Pass 1.0 = 00 FAB 3:2 R 0x00 Represents the wafer manufacturing facility Pass 1.0 = 00 Unused 7:0 R 0x00 Unused Table 131. Register MEMA ADDR 0x1C Name Bit # R/W Default Description MEMA 7:0 R/W 0 Memory bank A Table 132. Register MEMB ADDR 0x1D Name Bit # R/W Default Description MEMB 7:0 R/W 0 Memory bank B Table 133. Register MEMC ADDR 0x1E Name Bit # R/W Default Description MEMC 7:0 R/W 0 Memory bank C Table 134. Register MEMD ADDR 0x1F Name Bit # R/W Default Description MEMD 7:0 R/W 0 Memory bank D |
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