STPMC1 datasheet(62/77 Pages) STMICROELECTRONICS

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Theory of operation

STPMC1

62/77

Doc ID 15728 Rev 6

9.21.2

Reading data records

Data record reading takes place most often when there is an on-board microcontroller in an

application. This microcontroller is capable of reading all measurement results and all

system signals (configuration, calibration, status, mode). Again, the time step can be as

short as 30 ns. There are two phases of reading, called latching and shifting.

Latching is used to sample results into transmission latches. The transmission latches are

the flip-flops that hold the data in the SPI interface. This is done with the active pulse on

SYN when SCS is idle. The length of pulse on SYN must be longer than 2 periods of

measurement clock, i.e. more than 500 ns at 4 MHz.

The shifting starts when SCS become active. In the beginning of this phase another, but

much shorter, pulse (30 ns) on SYN should be applied in order to ensure that an internal

transmission serial clock counter is reset to zero. An alternative way is to extend the pulse

on SYN into the second phase of reading. After that reset is done, a 32 serial clocks per

data record should be applied. Up to 8 data records can be read this way. This procedure

can be aborted at any time by deactivation of SCS.

The timing diagram of the reading operation is shown in timing for data records reading. One

can see the latching and beginning of shifting phase of the first byte of the first data record

and end of reading.

t1 −> t2: Latching Phase. Interval value > 2/fCLK

t2 −> t3: Data latched, SPI idle. Interval value > 30 ns.

t3 −> t4: Enable SPI for read operation. Interval value > 30 ns.

t4 −> t5: Serial clock counter is reset. Interval value > 30 ns.

t5 −> t6: SPI reset and enabled for read operation. Interval value > 30 ns

t7: Internal data transferred to SDATD

t8: SDATD data is stable and can be read

Figure 22.

Timing for data records reading

SCLNLC

SDATD

SYN

SCS

1st byte

last bit of 32nd byte

f(read)

3t4

SCLNLC

SDATD

SYN

SCS

1st byte

last bit of 32nd byte

f(read)

3t4

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