STPMC1 datasheet(40/77 Pages) STMICROELECTRONICS

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Theory of operation

STPMC1

40/77

Doc ID 15728 Rev 6

9.16

Calibration (configuration bits: PM, TCS, CIX, CVX, CCA,

CCB, CPX)

9.16.1

Voltage and current channels calibration

The 8-bit calibration values CVX and CIX (where X stands for N, R, S or T) are used as

static data for the channel

ΔΣ calibrators, multiplying their streams to the following factor:

KX = (4096 - 1024 + 4CXX)/4096

(± 12.5 %)

When configuration bit PM is set, a 2-bit CvX or CiX is appended to each CVX or CIX

respectively:

KX = (8192 - 1024 + 4CXX + CxX)/8192

(± 6.25 %)

CvX bits are part of the CCA configuration byte while CiX are part of CCB configuration

byte.

9.16.2

Phase compensation

The STPMC1 does not introduce any phase shift between voltage and current channel.

However, the voltage and current signals come from transducers, which could have inherent

phase errors. For example, a phase error of 0.1° to 0.3° is not uncommon for a current

transformer (CT). These phase errors can vary from part to part, and they must be corrected

in order to perform accurate power calculations. The errors associated with phase mismatch

are particularly noticeable at low power factors.

The STPMC1 provides a means of digitally calibrating these small phase errors introducing

some delay. The amount of phase compensation can be set per each phase using the 4 bits

of the phase calibration configurators (CPR, CPS, CPT).

A vector method of phase shift compensation is implemented.

The compensating voltage vector, which is produced from a frequency compensated signal

of integrated voltage vector multiplied by a given compensation constant per each phase

and is almost perpendicular to the input voltage vector, is subtracted from the input voltage

vector at the input of the decimation filter.

Those phase compensators are merged from a common coarse part CPC and from each

phase 4-bit phase error compensator CPX:

CPC[1] = 0: KPHC = - (16 CPC[0] + CPX)

CPC[1] = 1: KPHC = (16 - CPX)

When either PM or TCS are set, a 2-bit CpC is appended to CPC to produce the following

factor:

CPC[1] = 0: KPHC = - (32 CpC + 16 CPC[0] + CPX)

CPC[1] = 1: KPHC = [64 - (32 CpC + 16 CPC[0] + CPX)]

CpC bits are part of the CCA configuration byte.

The equation for phase compensation in degree is:

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