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STPMC1 数据表(PDF) 24 Page - STMicroelectronics

部件名 STPMC1
功能描述  Programmable poly-phase energy calculator IC
PDF  77 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STPMC1 数据表(HTML) 24 Page - STMicroelectronics

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Theory of operation
STPMC1
24/77
Doc ID 15728 Rev 6
The
ZCR signal is a 3-phase voltage zero cross signal. It is the result of a XNOR of the ZCR
of each phase. The
ZCR of each of the three-phases is a 100 Hz signal, so a 3-phase ZCR
is 300 Hz signal. The
ZCR signal is available on the MOP pin only when the STPMC1 works
as a peripheral with the configuration bit APL=0.
9.6
Period and line voltage measurement (status bits:
LIN, BFR,
LOW, BFF)
From voltage channels, a base frequency signal
LIN is obtained, which is high when the line
voltage is rising and it is low when the line voltage is falling, so that,
LIN signal represents
the sign of dv/dt. With further elaboration, the
ZCR signal is also produced.
A period meter, which is counting up pulses of fMCLK/8 reference signal, measures the
period of voltage channel base frequency and checks if the voltage signal frequency is in the
band going from fMCLK/(2
18 - 23) ≈ fMCLK/218 to fMCLK/216.
This is done, phase by phase, by means of the signal
LIN, which trailing edge is extracted
and it is used to reset the period meter.
If the counted number of fMCLK/8 pulses between two trailing edges of LIN is higher than the
218 equivalent pulses or if the counting is never stopped (no more
LIN trailing edge), the
base frequency exceeds the lower limit and an error flag
BFR is set. This error flag is part of
the 8-bit status byte of each phase (see
Table 32).
Figure 9.
ZCR signal
Table 13.
Good frequency ranges for different clock source values
fXTAL
fMCLK
freq. min. = fMCLK/2
18
freq. max. = fMCLK/2
16
4.194 MHz
8.389 MHz
32.0 Hz
128.0 Hz
4.915 MHz
9.830 MHz
37.5 Hz
150.0 Hz
8.192 MHz
8.192 MHz
31.3 Hz
125.0 Hz
9.830 MHz
9.830 MHz
37.5 Hz
150.0 Hz



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