AD1816A

–38–

REV. A

DM

DAC Mute. This bit mutes the digital DAC output entering the analog mixer.

GPSP

Game Port Speed Select. Selects the operating speed of the game port.

0

Slow Game Port

1

Fast Game Port

PD3D

Power-Down 3D. Turns off internal Phat Stereo circuitry.

0On

1

Off

3D

3D Analog Mixer Bypass. Allows the analog output of the D/A converters to bypass the Phat Stereo Circuit. Enables

ultimate flexibility for mixing and any combination of 3D enhanced analog signals or non-3D enhanced signals with

the DAC output.

0

3D Phat Stereo Enabled for DAC Output

1

3D Phat Stereo Bypassed for DAC Output

PTB

Power-Down Time Base. 1 = timer set to 100 ms, 0 = timer set to 10

µs.

PDP

Power-down count reload on DSP Port enabled; “1” = Reload count if DSP Port enabled. DSP Port is enabled when

Slot 0 of SDI of the DSP Serial Port Input is Alive (Bit 7 = 1).

PDA

Power-down count reload on Digital Activity; “1” = Reload count on Digital Activity. Digital Activity is defined as any

activity on (I

PAA

Power-down count reload on Analog Activity; “1” = Reload count on Analog Activity. Analog Activity is defined as any

analog input unmuted (LINE, CD, SYNTH, MIC, PHONE_IN) or MASTER VOLUME unmuting.

PIR

Power-down count reload on ISA Read; “1” = Reload count on ISA read. ISA Read is defined as a read from any active

logical device inside the AD1816A.

PIW

Power-down count reload on ISA Write; “1” = Reload count on ISA write. ISA Write defined as a write to any active

logical device inside the AD1816A.

CPD

Chip Power-down

1

Power-Down;

0

Power-Up

For Power-up, software should poll the [SSBASE+0] CRY bit for “1” before writing or reading any logical device.

[45] VERSION ID

DEFAULT = [0xXXXX]

7654321076543210

VER [15:8]

VER [7:0]

[46] RESERVED

DEFAULT = [0x0000]

7654321076543210

RES

RES

Test register. Should never be written or read under normal operation.

SB Pro; AdLib Registers

The AD1816A contains sets of ISA Bus registers (ports) that correspond to those used by the SoundBlaster Pro audio card from

Creative Labs and the AdLib audio card from AdLib Multimedia. Table IX lists the ISA Bus SoundBlaster Pro registers. Table X

lists the ISA Bus AdLib registers. Because the AdLib registers are a subset of those in the SoundBlaster card, you can find complete

information on using both of these registers in the Developer Kit for SoundBlaster Series, 2nd ed. © 1993, Creative Labs, Inc., 1901

McCarthy Blvd., Milpitas, CA 95035.

Table IX. SoundBlaster Pro ISA Bus Registers

Register Name

ISA Bus Address

Music0: Address (w), Status (r)

(SB Base) Relocatable in range 0x100 – 0x3F0

Music0: Data (w)

(SB Base+1)

Music1: Address (w)

(SB Base+2)

Music1: Data (w)

(SB Base+3)

Mixer Address (w)

(SB Base+4)

Mixer Data (w)

(SB Base+5)

Reset (w)

(SB Base+6)

Music0: Address (w)

(SB Base+8)

Music0: Data (w)

(SB Base+9)

Input Data (r)

(SB Base+A)

Status (r), Output Data (w)

(SB Base+C)

Status (r)

(SB Base+E)