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AD1816AJS 数据表(PDF) 6 Page - Analog Devices

部件名 AD1816AJS
功能描述  SoundPort Controller
PDF  52 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD1816AJS 数据表(HTML) 6 Page - Analog Devices

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AD1816A
–6–
REV. A
TIMING PARAMETERS
(Guaranteed Over Operating Temperature Range)
Parameter
Symbol
Min
Typ
Max
Units
IOW/IOR Strobe Width
tSTW
100
ns
IOW/IOR Rising to IOW/IOR Falling
tBWDN
80
ns
Write Data Setup to
IOW Rising
tWDSU
10
ns
IOW Falling to Valid Read Data
tRDDV
40
ns
AEN Setup to
IOW/IOR Falling
tAESU
10
ns
AEN Hold from
IOW/IOR Rising
tAEHD
0ns
Adr Setup to
IOW/IOR Falling
tADSU
10
ns
Adr Hold from
IOW/IOR Rising
tADHD
0ns
DACK Rising to IOW/IOR Falling
tDKSU
20
ns
Data Hold from
IOR Rising
tDHD1
2ns
Data Hold from
IOW Rising
tDHD2
15
ns
DRQ Hold from
IOW/IOR Falling
tDRHD
25
ns
DACK Hold from IOW/IOR Rising
tDKHD
10
ns
Data [SDI] Input Setup Time to SCLK*
tS
15
ns
Data [SDI] Input Hold Time from SCLK*
tH
10
ns
Frame Sync [SDFS] HI Pulse Width*
tFSW
80
ns
C
lock [SCLK] to Frame Sync [SDFS]
Propagation Delay*tPD
15
ns
Clock [SCLK] to Output Data [SDO] Valid*
tDV
15
ns
RESET Pulse Width
tRPWL
100
ns
BCLK HI Pulse Width
tDBH
25
ns
BCLK LO Pulse Width
tDBL
25
ns
BCLK Period
tDBP
50
ns
LRCLK Setup
tDLS
5ns
SDATA Setup
tDDS
5ns
SDATA Hold
tDDH
5ns
NOTES
*Guaranteed, not tested.
†All ISA pins MIDI_OUT IOL = 24 mA. Refer to pin description for individual output drive levels.
Specifications subject to change without notice.
tDKSU
tDKHD
tAESU
tAEHD
tSTW
tDHD2
tADSU
tADHD
DRQ (0, 1, 3)
DACK (0, 1, 3)
AEN
IOW
PC_D [7:0]
PC_A [15:0]
tWDSU
Figure 2. PIO Write Cycle
t
DKSU
t
DKHD
t
AESU
t
AEHD
t
STW
t
RDDV
t
DHD1
t
ADSU
t
ADHD
DRQ (0, 1, 3)
DACK (0, 1, 3)
AEN
IOR
PC_D [7:0]
PC_A [15:0]
Figure 1. PIO Read Cycle



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