AD1816AJS datasheet(14/52 Pages) AD

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AD1816A

–14–

REV. A

Hardware Volume Pins

Pin Name

PQFP

TQFP

I/O

Description

VOL_DN*

2, 99, 100

97, 98, 100

Master Volume Down. Modifies output level on pins L_OUT and R_OUT.

When asserted LO, decreases Master Volume by 1.5 dB/sec. Must be asserted at

least 25 ms to be recognized. When asserted simultaneously with

VOL_UP, out-

put is muted. Output level modification reflected in indirect register [41].

VOL_UP*

1, 98

96, 99

Master Volume Up. Modifies output level on pins L_OUT and R_OUT. When

asserted LO, increases Master Volume by 1.5 dB/sec. Must be asserted at least

25 ms to be recognized. When asserted simultaneously with

VOL_UP, output is

muted. Output level modification reflected in indirect register [41].

Control Pins

Pin Name

PQFP

TQFP

I/O

Description

XCTL0*

External Control 0. The state of this pin (TTL HI or LO) is reflected in codec

indexed register. This pin is an open drain driver.

PCLKO*

Programmable Clock Output. This pin can be programmed to generate an out-

put clock equal to FS, 8 × FS, 16 × FS, 32 × FS, 64 × FS, 128 × FS or 256 × FS.

MPEG decoders typically require a master clock of 256

× F

S for audio

synchronization.

XCTL1*

External Control 1. The state of this pin (TTL HI or LO) is reflected in codec

indexed register. Open drain, 8 mA active 0.5 mA pull-up resistor.

RING*

Ring Indicator. Used to accept the ring indicator flag from the DAA.

Power Supplies

Pin Name

PQFP

TQFP

I/O

Description

VCC

Analog Supply Voltage (+5 V).

GNDA

Analog Ground.

VDD

23, 62, 71,

21, 60, 69,

Digital Supply Voltage (+5 V).

89, 95

87, 93

GND

3*, 24, 65,

1*, 22, 63,

Digital Ground.

70, 84, 90,

68, 82, 88,

96, 99*, 100*

94, 97*, 98*

Optional EEPROM Pins

Pin Name

PQFP

TQFP

I/O

Description

EE_CLK

EEPROM Clock. Open drain output, requires external pull-up.

EE_DATA

I/O

EEPROM Data. Open drain I/O, requires external pull-up.

*The position of this pin location/function is dependent on the EEPROM data.

AD1816AJS 数据表(PDF) 14 Page - Analog Devices

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AD1816AJS 数据表(PDF) 14 Page - Analog Devices

AD1816AJS 数据表(HTML) 14 Page - Analog Devices

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