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AD9852/PCB 数据表(PDF) 33 Page - Analog Devices |
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AD9852/PCB 数据表(HTML) 33 Page - Analog Devices |
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33 / 42 page ![]() AD9852 –33– REV. 0 SOLDER MASK OPENING THERMAL LAND Figure 59. The thermal land itself must be able to distribute heat to an even larger copper plane such as an internal ground plane. Vias must be uniformly provided over the entire thermal pad to connect to this internal plane. A proposed via pattern is shown in Figure 60. Via holes should be small (12 mils, 0.3 mm) such that they can be plated and plugged. These will provide the mechanical conduit for heat transfer. Figure 60. Finally, a proposed stencil design is depicted for screen solder placement. Note that if vias are not plugged, wicking will occur which will displace solder away from the exposed heat sink and the necessary mechanical bond will not be established. Figure 61. EVALUATION BOARD An evaluation board is available that supports the AD9852 DDS devices. This evaluation board consists of a PCB, software, and documentation to facilitate bench analysis of the performance of the AD9852 device. It is recommended that users of the AD9852 familiarize themselves with the operation and performance capabilities of the device with the evaluation board. The evaluation board should also be used as a PCB reference design to ensure optimum dynamic performance from the device. OPERATING INSTRUCTIONS To assist in proper placement of the pin-header shorting-jumpers, the instructions will refer to direction (left, right, top, bottom) as well as header pins to be shorted. Pin #1 for each three pin- header has been marked on the PCB corresponding with the schematic diagram. When following these instructions, position the PCB so that the text can be read from left to right. The board is shipped with the pin-headers configuring the board as follows: 1. REFCLK for the AD9852 is configured as differential. The differential clock signals are provided by the 100LVEL16 differential receiver. 2. Input clock for the 100LVEL16 is single-ended via J5. This signal may be 3.3 V CMOS or a 2 V p-p sine wave capable of driving 50 Ω (R8). 3. Both DAC outputs from the AD9852 are routed through the two 120 MHz elliptical LP filters and their outputs con- nected to J3 (Q) and J4 (I). 4. The board is set up for software control via the printer port connector. 5. Configured for AD9852 operation. Load the software from the CD onto the host PC’s hard disk. Only Windows 9X/NT operating system is supported. Connect a printer cable from the PC to the AD9852 Evaluation Board printer port connector labeled “J11.” |
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