WM8953ECSSLASHRV datasheet(56/100 Pages) WOLFSON

56 / 100 page

WM8953

Production Data

PD, January 2009, Rev 4.0

DIGITAL AUDIO INTERFACE

The digital audio interface is used for outputting ADC data from the WM8953. It uses three pins:

•

ADCDAT: ADC data output

•

ADCLRC: ADC data alignment clock

•

BCLK: Bit clock, for synchronisation

The clock signals BCLK and ADCLRC can be outputs when the WM8953 operates as a master, or

inputs when it is a slave (see Master and Slave Mode Operation, below).

Four different audio data formats are supported:

•

Left justified

•

Right justified

•

I2S

•

DSP mode

All four of these modes are MSB first. They are described in Audio Data Formats, below. Refer to the

“Electrical Characteristics” section for timing information.

Time Division Multiplexing (TDM) is available in all four data format modes. The WM8953 can be

programmed to send and receive data in one of two time slots.

PCM operation is supported using the DSP mode.

MASTER AND SLAVE MODE OPERATION

The WM8953 digital audio interface can operate as a master or slave as shown in Figure 29 and

Figure 30.

Figure 29 Master Mode

Figure 30 Slave Mode

The dual Audio Interface approach of the WM8953 has been implemented in such a way that it gives

the user and application as much flexibility as possible. The application needs to be carefully

analysed and the WM8953 configured accordingly. The Audio Interface Output Control is illustrated

in Figure 31.

WM8953ECS/RV 数据表(PDF) 56 Page - Wolfson Microelectronics plc

WM8953ECS/RV 数据表(HTML) 56 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

数据表下载