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WM8953ECS/RV 数据表(PDF) 17 Page - Wolfson Microelectronics plc

部件名 WM8953ECS/RV
功能描述  Low Power Stereo ADC with PLL and TDM Interface
PDF  100 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8953ECS/RV 数据表(HTML) 17 Page - Wolfson Microelectronics plc

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Production Data
WM8953
w
PD, January 2009, Rev 4.0
17
AUDIO INTERFACE TIMING – MASTER MODE
Figure 3 Digital Audio Data Timing - Master Mode (see Control Interface)
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=3.3V, DGND=AGND=0V, TA=+25
oC, Master Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless
otherwise stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Audio Data Timing Information
ADCLRC propagation delay from BCLK falling edge
tDL
20
ns
ADCDAT propagation delay from BCLK falling edge
tDDA
20
ns



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