M95128-RMB6TG datasheet(9/49 Pages) STMICROELECTRONICS

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M95128-W M95128-R M95128-DF

Signal description

Doc ID 5798 Rev 16

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Signal description

During all operations, VCC must be held stable and within the specified valid range:

VCC(min) to VCC(max).

All of the input and output signals must be held high or low (according to voltages of VIH,

VOH, VIL or VOL, as specified in Section 9: DC and AC parameters). These signals are

described next.

3.1

Serial Data Output (Q)

This output signal is used to transfer data serially out of the device. Data is shifted out on the

falling edge of Serial Clock (C).

3.2

Serial Data Input (D)

This input signal is used to transfer data serially into the device. It receives instructions,

addresses, and the data to be written. Values are latched on the rising edge of Serial Clock

(C).

3.3

Serial Clock (C)

This input signal provides the timing of the serial interface. Instructions, addresses, or data

present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on

Serial Data Output (Q) change from the falling edge of Serial Clock (C).

3.4

Chip Select (S)

When this input signal is high, the device is deselected and Serial Data Output (Q) is at high

impedance. The device is in the Standby Power mode, unless an internal Write cycle is in

progress. Driving Chip Select (S) low selects the device, placing it in the Active Power mode.

After power-up, a falling edge on Chip Select (S) is required prior to the start of any

instruction.

3.5

Hold (HOLD)

The Hold (HOLD) signal is used to pause any serial communications with the device without

deselecting the device.

During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data

Input (D) and Serial Clock (C) are Don’t Care.

To start the Hold condition, the device must be selected, with Chip Select (S) driven low.

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