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M95128-RMB6TG 数据表(PDF) 18 Page - STMicroelectronics |
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M95128-RMB6TG 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 49 page ![]() Instructions M95128-W M95128-R M95128-DF 18/49 Doc ID 5798 Rev 16 Figure 9. Write Disable (WRDI) sequence 6.3 Read Status Register (RDSR) The Read Status Register (RDSR) instruction is used to read the Status Register. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When one of these cycles is in progress, it is recommended to check the Write In Progress (WIP) bit before sending a new instruction to the device. It is also possible to read the Status Register continuously, as shown in Figure 10. Figure 10. Read Status Register (RDSR) sequence The status and control bits of the Status Register are as follows: 6.3.1 WIP bit The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write Status Register cycle. When set to 1, such a cycle is in progress, when reset to 0, no such cycle is in progress. C D AI03750D S Q 2 1 34567 High Impedance 0 Instruction C D S 2 1 3456789 10 11 12 13 14 15 Instruction 0 AI02031E Q 7 6543210 Status Register Out High Impedance MSB 7 6543210 Status Register Out MSB 7 |
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