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M95128-RMB6TG 数据表(PDF) 29 Page - STMicroelectronics

部件名 M95128-RMB6TG
功能描述  128-Kbit serial SPI bus EEPROM with high-speed clock
PDF  49 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95128-RMB6TG 数据表(HTML) 29 Page - STMicroelectronics

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M95128-W M95128-R M95128-DF
Instructions
Doc ID 5798 Rev 16
29/49
6.10
Lock ID (available only in M95128-D devices)
The Lock ID instruction permanently locks the Identification Page in read-only mode. Before
this instruction can be accepted, a Write Enable (WREN) instruction must have been
executed.
The Lock ID instruction is issued by driving Chip Select (S) low, sending the instruction
code, the address and a data byte on Serial Data Input (D), and driving Chip Select (S) high.
In the address sent, A10 must be equal to 1, all other address bits are Don't Care. The data
byte sent must be equal to the binary value xxxx xx1x, where x = Don't Care.
Chip Select (S) must be driven high after the rising edge of Serial Clock (C) that latches in
the eighth bit of the data byte, and before the next rising edge of Serial Clock (C). Otherwise,
the Lock ID instruction is not executed.
Driving Chip Select (S) high at a byte boundary of the input data triggers the self-timed write
cycle whose duration is tW (as specified in AC characteristics in Section 9: DC and AC
parameters). The instruction sequence is shown in Figure 18.
The instruction is discarded, and is not executed, under the following conditions:
If a Write cycle is already in progress,
If the Block Protect bits (BP1,BP0) = (1,1),
If a rising edge on Chip Select (S) happens outside of a byte boundary.
Figure 18.
Lock ID sequence



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