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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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W25Q40BLSVIP 数据表(PDF) 62 Page - Winbond |
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W25Q40BLSVIP 数据表(HTML) 62 Page - Winbond |
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62 / 74 page  W25Q40BL - 62 - 8.6 AC Electrical Characteristics DESCRIPTION SYMBOL ALT SPEC UNIT MIN TYP MAX Clock frequency for all instructions except Read Data instruction (03h) 2.3V-2.7V VCC & Industrial Temperature FR fC D.C. 50 MHz Clock frequency for all instructions except Read Data instruction (03h) 2.7V-3.6V VCC & Industrial Temperature FR fC D.C. 80 MHz Clock frequency for Read Data instruction (03h) fR D.C. 25 MHz Clock High, Low Time for all instructions except Read Data (03h) tCLH1, tCLL1(1) 7 ns Clock High, Low Time for Read Data (03h) instruction tCRLH, tCRLL(1) 13 ns Clock Rise Time peak to peak tCLCH(2) 0.1 V/ns Clock Fall Time peak to peak tCHCL(2) 0.1 V/ns /CS Active Setup Time relative to CLK tSLCH tCSS 5 ns /CS Not Active Hold Time relative to CLK tCHSL 5 ns Data In Setup Time tDVCH tDSU 2 ns Data In Hold Time tCHDX tDH 5 ns /CS Active Hold Time relative to CLK tCHSH 5 ns /CS Not Active Setup Time relative to CLK tSHCH 5 ns /CS Deselect Time (for Array Read Array Read) tSHSL1 tCSH 50 ns /CS Deselect Time (for Erase or Program Read Status Registers) Volatile Status Register Write Time tSHSL2 tCSH 100 50 ns Output Disable Time tSHQZ(2) tDIS 7 ns Clock Low to Output Valid tCLQV1 tV1 9 ns Clock Low to Output Valid (for Read ID instructions) tCLQV2 tV2 9 ns Output Hold Time tCLQX tHO 0 ns /HOLD Active Setup Time relative to CLK tHLCH 5 ns Continued – next page |
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